Fiche technique pour ESD114-U1-02 Series de Infineon Technologies

(in/fineon
Power Management & Multimarket
Data Sheet
Revision 1.0, 2014-10-30
Final
ESD114-U1-02 Series
Uni-directional, 5.3 V, 0.4 pF, 0402, 0201, RoHS and Halogen Free compliant
ESD114-U1-02ELS
ESD114-U1-02EL
Protection Device
TVS (Transient Voltage Suppressor)
Edition 2014-10-30
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2014 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com)
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Infineon K 7
ESD114-U1-02 Series
Product Overview
FinalData Sheet 4 Revision 1.0, 2014-10-30
1 Product Overview
1.1 Features
ESD / Transient protection of high speed data lines exceeding
IEC61000-4-2 (ESD): ±20 kV (contact)
IEC61000-4-4 (EFT): ±2 kV / ±40 A (5/50 ns)
IEC61000-4-5 (surge): ±3 A (8/20 μs)
Maximum working voltage: VRWM = ±5.3 V
Ultra low capacitance: CL = 0.4 pF (typical)
Very low clamping voltage VCL = +20 / -15 V (typical) at ITLP = 16 A
Low dynamic resistance RDYN = 0.5 (typical)
Very small form factor down to 0.62 x 0.32 x 0.31 mm3
Pb-free (RoHS compliant) and halogen free package
1.2 Application Examples
USB 2.0, Mobile HDMI Link, MDDI, MIPI, etc.
HDMI, DisplayPort, DVI, Ethernet, Firewire, S-ATA
1.3 Product Description
Figure 1 Pin Configuration and Schematic Diagram
Table 1 Ordering Information
Type Package Configuration Marking code
ESD114-U1-02ELS TSSLP-2-3 1 line, uni-directional K
ESD114-U1-02EL TSLP-2-19 1 line, uni-directional K
Single _Die_diode_PinConf_and_SchematicDiag.vst .vsd
b) Schematic diagrama) Pin configuration
Pin 1 Pin 2
Pin 1
Pin 2
Pin 1 marking
(lasered)
@neon
ESD114-U1-02 Series
Maximum Ratings
FinalData Sheet 5 Revision 1.0, 2014-10-30
2 Maximum Ratings
Attention: Stresses above the max. values listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability. Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
3 Electrical Characteristics at TA = 25 °C, unless otherwise specified
Figure 2 Definitions of Electrical Characteristics
Table 2 Maximum Ratings at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit
ESD contact discharge1)
1) VESD according to IEC61000-4-2
VESD ±20 kV
Peak pulse current (tp = 8/20 μs)2)
2) Non-repetitive current pulse 8/20µs exponential decay waveform according to IEC61000-4-5
IPP ±3 A
Operating temperature range TOP -55 to 125 °C
Storage temperature Tstg -65 to 150 °C
















 
 
 
 
!"  !!# $  




%&  
' &(
'
&) 

'
')


@neon
ESD114-U1-02 Series
Electrical Characteristics at TA = 25 °C, unless otherwise specified
FinalData Sheet 6 Revision 1.0, 2014-10-30
Table 3 DC Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Reverse working voltage VRWM 5.3 V Pin 1 to Pin 2
Breakdown voltage VBR 6––VIBR = 1 mA, from Pin 1
to Pin 2
Reverse current IR <10 100 nA VR = 5.3 V, from Pin 1
to Pin 2
Table 4 RF Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Line capacitance1)
1) Total capacitance line to ground
CL–0.40.6pFVR = 0 V, f = 1 MHz
Serie inductance LS 0.2 nH ESD114-U1-02ELS
0.4 nH ESD114-U1-02EL
Table 5 ESD Characteristics at TA = 25 °C, unless otherwise specified
Parameter Symbol Values Unit Note /
Test Condition
Min. Typ. Max.
Clamping voltage VCL –10–VITLP = 1 A,
from Pin 1 to Pin 2
–20ITLP = 16 A,
from Pin 1 to Pin 2
–28ITLP = 30 A,
from Pin 1 to Pin 2
–3– ITLP = 1 A,
from Pin 2 to Pin 1
–15ITLP = 16 A,
from Pin 2 to Pin 1
–21ITLP = 30 A,
from Pin 2 to Pin 1
Dynamic resistance1)
1) Please refer to Application Note AN210[1]. TLP parameter: Z0 = 50 Ω , tp = 100ns, tr = 300ps, averaging window: t1 = 30 ns
to t2 = 60 ns, extraction of dynamic resistance using least squares fit of TLP charactertistics between IPP1 = 10 A and
IPP2 = 40 A.
RDYN 0.56 V Pin 1 to Pin 2
0.43 V Pin 2 to Pin 1
@neon
ESD114-U1-02 Series
Typical Characteristics Diagrams
FinalData Sheet 7 Revision 1.0, 2014-10-30
4 Typical Characteristics Diagrams
Typical characteristics diagrams at TA = 25°C, unless otherwise specified
Figure 3 Reverse leakage current:IR = f(VR)
Figure 4 Line capacitance: CL = f(VR)
10-13
10-12
10-11
10-10
10-9
10-8
10-7
10-6
10-5
10-4
10-3
10-2
0 1 2 3 4 5 6
IR [A]
VR [V]
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6
CL [pF]
VR [V]
1 MHz
1 GHz
@neon
ESD114-U1-02 Series
Typical Characteristics Diagrams
FinalData Sheet 8 Revision 1.0, 2014-10-30
Figure 5 IEC61000-4-2 : VCL = f(t), 8 kV positive pulse from pin 1 to pin 2
Figure 6 IEC61000-4-2 : VCL = f(t), 8 kV negative pulse from pin 1 to pin 2
-20
0
20
40
60
80
100
120
-50 0 50 100 150 200 250 300 350 400 450
VCL [V]
tp [ns]
Scope: 6 GHz, 20 GS/s
VCL-max-peak = 112 V
VCL-30ns-peak = 17 V
-120
-100
-80
-60
-40
-20
0
20
-50 0 50 100 150 200 250 300 350 400 450
VCL [V]
tp [ns]
Scope: 6 GHz, 20 GS/s
VCL-max-peak = -99 V
VCL-30ns-peak = -13 V
@neon
ESD114-U1-02 Series
Typical Characteristics Diagrams
FinalData Sheet 9 Revision 1.0, 2014-10-30
Figure 7 IEC61000-4-2 : VCL = f(t), 15 kV positive pulse from pin 1 to pin 2
Figure 8 IEC61000-4-2 : VCL = f(t), 15 kV negative pulse from pin 1 to pin 2
-20
0
20
40
60
80
100
120
140
160
180
-50 0 50 100 150 200 250 300 350 400 450
VCL [V]
tp [ns]
Scope: 6 GHz, 20 GS/s
VCL-max-peak = 154 V
VCL-30ns-peak = 25 V
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
20
-50 0 50 100 150 200 250 300 350 400 450
VCL [V]
tp [ns]
Scope: 6 GHz, 20 GS/s
VCL-max-peak = -139 V
VCL-30ns-peak = -19 V
@neon
ESD114-U1-02 Series
Typical Characteristics Diagrams
FinalData Sheet 10 Revision 1.0, 2014-10-30
Figure 9 Clamping voltage (TLP): ITLP = f(VTLP) [1], pin 1 to pin 2
-40
-30
-20
-10
0
10
20
30
40
-35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 25 30 35
-20
-15
-10
-5
0
5
10
15
20
ITLP [A]
Equivalent VIEC [kV]
VTLP [V]
ESD114-U1-02EL
RDYN RDYN = 0.56 Ω
RDYN = 0.43 Ω
infineon g
ESD114-U1-02 Series
Package Information
FinalData Sheet 11 Revision 1.0, 2014-10-30
5 Package Information
5.1 TSSLP-2-3 (mm)[3]
Figure 10 TSSLP-2-3: Package overview
Figure 11 TSSLP-2-3 Footprint
Figure 12 TSSLP-2-3: Packing
Figure 13 TSSLP-2-3: Marking (example)
TSSLP-2-3, -4-PO V01
±0.05
0.32
1
2
±0.035
0.2
1)
0.62
±0.05
+0.01
0.31-0.02
1) Dimension applies to plated terminals
Pin 1
marking
1)
±0.035
0.26
0.05 MAX.
Bottom viewTop view
0.355
0.27
0.19
0.19
0.19
Copper Solder mask Stencil apertures
0.57
0.24
0.62
0.32
0.24
0.14
TSSLP-2-3, -4-FP V02
Ex
4
Ey
0.35
Pin 1
marking
8
TSSLP-2-3, -4-TP V03
Deliveries can be both tape types (no selection possible).
Specification allows identical processing (pick & place) by users.
Ex Ey
Punched Tape
Tape type
Embossed Tape
0.43 0.73
0.37 0.67
TSSLP-2-3, -4-MK V01
Pin 1 marking
1
Type code
infineon m” 1} 9;} 0‘93 VA m 0 033 Vfim
ESD114-U1-02 Series
Package Information
FinalData Sheet 12 Revision 1.0, 2014-10-30
5.2 TSLP-2-19 (mm)[3]
Figure 14 TSLP-2-19: Package Overview
Figure 15 TSLP-2-19: Footprint
Figure 16 TSLP-2-19: Packing
Figure 17 TSLP-2-19: Marking (example)
TSLP-2-19, -20-PO V01
±0.05
0.6
1
2
±0.05
0.65
±0.035
0.25 1)
1±0.05
0.05 MAX.
+0.01
0.31-0.02
1) Dimension applies to plated terminals
Pin 1
marking
1)
±0.035
0.5
Bottom viewTop view
TSLP-2-19, -20-FP V01
0.45
0.28 0.28
0.38
0.93
Copper Solder mask Stencil apertures
0.35
1
0.6
0.35
0.3
Type code
Pin 1 marking
TSLP-2-19, -20-MK V01
12
infineon
ESD114-U1-02 Series
References
FinalData Sheet 15 Revision 1.0, 2014-10-30
References
[1] Infineon AG - Application Note AN210: Effective ESD Protection Design at System Level Using VF-TLP
[2] Infineon AG - Application Note AN140: ESD Protection for Digital High-Speed Interfaces (HDMI, FireWire,
...) using ESD5V3U1U)
[3] Infineon AG - Recommendations for PCB Assembly of Infineon TSLP and TSSLP Package
@neon
ESD114-U1-02 Series
FinalData Sheet 3 Revision 1.0, 2014-10-30
Trademarks of Infineon Technologies AG
AURIX™, BlueMoon™, COMNEON™, C166™, CROSSAVE™, CanPAK™, CIPOS™, CoolMOS™, CoolSET™,
CORECONTROL™, DAVE™, EasyPIM™, EconoBRIDGE™, EconoDUAL™, EconoPACK™, EconoPIM™,
EiceDRIVER™, EUPEC™, FCOS™, HITFET™, HybridPACK™, ISOFACE™, I²RF™, IsoPACK™, MIPAQ™,
ModSTACK™, my-d™, NovalithIC™, OmniTune™, OptiMOS™, ORIGA™, PROFET™, PRO-SIL™,
PRIMARION™, PrimePACK™, RASIC™, ReverSave™, SatRIC™, SIEGET™, SINDRION™, SMARTi™,
SmartLEWIS™, TEMPFET™, thinQ!™, TriCore™, TRENCHSTOP™, X-GOLD™, XMM™, X-PMU™,
XPOSYS™.
Other Trademarks
Advance Design System™ (ADS) of Agilent Technologies, AMBA™, ARM™, MULTI-ICE™, PRIMECELL™,
REALVIEW™, THUMB™ of ARM Limited, UK. AUTOSAR™ is licensed by AUTOSAR development partnership.
Bluetooth™ of Bluetooth SIG Inc. CAT-iq™ of DECT Forum. COLOSSUS™, FirstGPS™ of Trimble Navigation
Ltd. EMV™ of EMVCo, LLC (Visa Holdings Inc.). EPCOS™ of Epcos AG. FLEXGO™ of Microsoft Corporation.
FlexRay™ is licensed by FlexRay Consortium. HYPERTERMINAL™ of Hilgraeve Incorporated. IEC™ of
Commission Electrotechnique Internationale. IrDA™ of Infrared Data Association Corporation. ISO™ of
INTERNATIONAL ORGANIZATION FOR STANDARDIZATION. MATLAB™ of MathWorks, Inc. MAXIM™ of
Maxim Integrated Products, Inc. MICROTEC™, NUCLEUS™ of Mentor Graphics Corporation. Mifare™ of NXP.
MIPI™ of MIPI Alliance, Inc. MIPS™ of MIPS Technologies, Inc., USA. muRata™ of MURATA
MANUFACTURING CO., MICROWAVE OFFICE™ (MWO) of Applied Wave Research Inc., OmniVision™ of
OmniVision Technologies, Inc. Openwave™ Openwave Systems Inc. RED HAT™ Red Hat, Inc. RFMD™ RF
Micro Devices, Inc. SIRIUS™ of Sirius Sattelite Radio Inc. SOLARIS™ of Sun Microsystems, Inc. SPANSION™
of Spansion LLC Ltd. Symbian™ of Symbian Software Limited. TAIYO YUDEN™ of Taiyo Yuden Co.
TEAKLITE™ of CEVA, Inc. TEKTRONIX™ of Tektronix Inc. TOKO™ of TOKO KABUSHIKI KAISHA TA. UNIX™
of X/Open Company Limited. VERILOG™, PALLADIUM™ of Cadence Design Systems, Inc. VLYNQ™ of Texas
Instruments Incorporated. VXWORKS™, WIND RIVER™ of WIND RIVER SYSTEMS, INC. ZETEX™ of Diodes
Zetex Limited.
Last Trademarks Update 2010-06-09
Revision History: Rev.09, 2014-06-20
Page or Item Subjects (major changes since previous revision)
Revision 1.0, 2014-10-30
All Status change to Final
Published by Infineon Technologies AG
www.infineon.com