Fiche technique pour MAX280, MXL1062 de Analog Devices Inc./Maxim Integrated

r9-oe73, Rev 3‘ 5/55 lVI/J X I IVI 5th Order, Zero oc Error, Lowpass Filter General Description ihe MAX280/MXL1062 are Sift-order allrpole msirumen» ration luwpass liliers With no Dc error. The filter uses an external resistor and capacitor to isolate the Integrated circuit from the DC signal path, thus provrdlng excellent DC accuracy The resrstor and capacitor, along With the onachrp 41h- order switched capacitor filter, term a Ethiorder low pass tiller. Two MAXZSO/MXLiOBZS can be cascaded to iorm a tom-order lowpass illter The lrlter cutoff irequency is set by an internal clock which can be externally driven The clock to cutoff- lrequency ratio is 100:1, allowing clock ripple to be easriy removed. The MAXZEO IS an enhanced versron oi the MXLIDGZ. ____— Foatum O Lowpasa Filter with No DC Error O Low Finland Nolu 0 DC to 20ka email Frequency 0 5!" Order All Pole FM” 0 Internal or Ext-mil Clock 0 Cam-bl. tor Higher Order Rollo" O Buttered Oulnut Available 0 a—Pln DIP or 16-Pln SOIC Ordering information Enchancements include tighter speciiicatlons on the PARY TEMP‘RANGE PIN'PACKAGE internal clock oscrllator irequency and the buifer amplre MAXHBOCPA 0°C ‘0 ”0°C 3 Lead P‘BSUC 0”" iier onset voltage _ _ MszaOCWE 0°C to +7o=c rs Leadwide so —— Animation! MAXZBOEPA 740°C to +85“C 3 Lead Plastic DIP Anti-Missing Filter MAXZEOEWE -Ao°c to +es=c re Lead Wide so Dam Loggers MAXZBOMJA 755°C is +12% 8 Lead CERDIP MXLIOEZCNB 410°C to +85%: 8 Lead Plastic DlP ”'9'“ VOI'mae's MXLIOGQCJB 740°C to +85%: 8 Lead CERDIP WE'Q" 308'“ MXLiOGZCS 40°C to +05% r6 Lead Wlde so Strain Gauges MXLrOfiQMJe -55“C i0 +1296 8 Lead CERDrP typical Operating Circuit Pln Configurations Top View F: [I V :1 Bow Lana I: IVI/iXI/VI 1| our DC ACCURATI “”7 ”WWI—* ourPur v- i: wanna :1 rr DIVIDER Cosc L FB OUY .__. RATIO E 2 Four 53357;“ 8~Pln 0.300 DIP U \ ,— + — "/0 I: [KI WC Mszeo "/c E 3 “’c v “V F! l: E Iouv , ma E MAXI/VI El our -5v — v Cosc — v E MAXQEO Bi v. mm: _|_ DMD-t IAYIO E El Cosc _L I we I: 1] we 2 2 rue 3 we 16—Pin 0.300" so Lowpass Filter [MAXI/VI Z 90 [- TXW/OGZXVW
___________________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAXZBO/MX L 1 062 5th Order, Zero 00 Error, Lowpass Filter ABSOLUTE MAXIMUM RATINGS Tc|a| Supply Voltage (w lo v Input Voltage at Any Pln.. .. Opalallng Tempelatule MAXZBDCXX/MXLI 062C ...... MAXZBOEXX MAXZEOMXX/MXLIOSZMH . ., V I Sims f .v‘ -03VSVINSV+ +0 3v 18V Power Dlsslpallon . O“C ID +70"C 40°C |o +85°C , 65"0 lo +125“C S|olage Temperatule Range . .. Lead Tempelalule Range (Soldenng lesec)... .. .. Plasllc DlP (aerate 5.25mW/“C above 70‘7C) CERDVP (delete 8 OOmW/“C above 70"C) SO (delale 9 52mW/“C above 70"C) abov- mou Imp-d under ‘Ibmlule Mnllmum Rum " "my causa parmnnanl damn: lo the davica Thus um um: mung: only mu 785°C . .640mw Io +150“C +300"C V SDOmW 762mW lunclmnal opmn‘on 0! m mm» ll mm: at My other con ilions shave thou lndicnlod in me awallbnal smions ol the specllloanon is run implied. Exmun. (a abaalul' maxlmum mlng candllions rm axmrrdad period: mly mm dlvicu mummy ELECTRICAL CHARACTERISTICS (v‘ = o5v, V' —5v, 1. z 29:. unless otherwise specified, AC output measured at pin 1 Figure I ) PARAMETER couolrlous Mm TYF MAX UNITS Operaflng Supply Voltage Dual Supply 12.375 :50 v Slngle Supply a 75 16 0 cos; (Pin 5 lo \r) = 100pF Power Supply Current T. 5‘C 50 70 mA TA = Tum to TMAX 50 10.0 lnpul Frequency Range 020 kHz Filter Gain m lax : IOOkHz, Pin 4 m v‘ C = 0.01MI’v R = 25.78“] Ilu = 0 0 IIN = 0-50 (Note ‘I <002><03 iin="Ic" ta="TMIN" to="" tmnx="" -2="" -6="" db="" fin="" -="" 2ic="" ta="TMIN" to="" tmax="" -2b="" 430="" ,m="" _="" 4'0="" t.="" :="" tum="" io="" tm="" -54="" ‘60="" clock="" to="" culufl="" frequency="" raiid="" 1cm="IOOkHz." pin="" 4="" at="" v‘="" ‘00="" 1="" ‘="" ich/ic="" c="omuF," r="25.7mm" filter="" gain="" at="" f.»="16kHz" ich="NHL" pin="" 4="" at="" v‘="" c="0.01uF." r="6.5“!" -46="" ~52="" db="" ta="Tum" to="" tmax="" low/lo="" temper)="" same="" as="" above="" 10="" ppm/”c="" .="" .="" .="" pin="" 7="" buflaed="" with="" an="" ex!="" op="" fllter="" omput="" (pln="" 7)="" dc="" sw-ng="" imp="" 1-a="TM.”" to="" me="" :35="" 13.5="" v="" clock="" foedlhrough="" 10="" mvw="" internal="" buffer="" bins="" current="" tn="25°C" 2="" 50="" da="" ta="Tum" l0="" tun="" 170="" 1000="" offset="" vollage="" ..="" u="" _="" ,="" "w="" mxl1062="" 2="" 20="" volmga="" swing="" r1="20km;" t.="Tm." in="" tu.“="" 13.5="" is="" a="" v="" short="" circuit="" currant="" source/sink="" 30/2="" ma="" clock="" (note="" 2)="" c051;="" (pin="" 5="" to="" v'="100" f="" mxliogz="" internal="" oscillator="" fremency="" )="" v="" _="" khz="" ta="TMIN" to="" me="" .="" c055="" (pin="" 5="" lo="" \r)="" z="" 10on="" quosz="" max="" clock="" frequency="" 4="" mhz="" case="" inpul="" sink/source="" cum-ml="" 1"="" :="" tum="" la="" tm;="" 25="" so="" ua="" m="" i:="" ic="" is="" the="" "fluency="" where="" the="" glln="" is="" {”5="" vlllh="" respem="" in="" the="" lnput="" slgnal.="" not.="" 2:="" the="" exiemal="" or="" driven="" clock="" irequency="" is="" divided="" by="" either="" i.="" 2,="" or="" 4="" depending="" upon="" the="" voluage="" at="" pin="" 4.="" when="" pin="" 4="V'," iclk/ic="100;" when="" pin="" 4="5ND." fem/io="200:" pin="" 4="V'," icu/io="‘00." 2="" mijxl/vi="">
5th Order, Zero Dc Ermr, Lowpass Filter Pin Description PIN ll NAME FUNCTION PIN or NAME FUNCTION 1 FB Extarnal capacitor couples to the 5 case Clock input pin lor external clock chip through this pin. applica_tions For internal clock 2 AGND Ground Connect to system ”mm" ““9“ ‘" amm' ground tar dual supply operation or mid-supply lor single operation. capacitor between this pin and \r This prn snoula be well bypassed a vt Positiva supply vollage using a large capacitor lor single our Input to on—chip buffer amplifier supply operation. V’ Negative supply voltags 30‘" Output of butter amplifier DIVIDER The oscillator frequency is dlvided RATIO by either 1. 2, or 4 depending upon the voltage on this pin. This In turn gives a clock to email lrequency ratio when lied to V‘ at 100'1; when lied to GND of 200:1; and when tied to V' 014001 1ypical Operating Characteristics GAIN NORMALIZED T0 CUTOFF FREQUENCY GAIN NORMALIZED TO CUTOFF FREQUENCY (V; = iSV) (vs = 12.5w 0 1 Vs : tsv -1a » TA : 25°C \ \\ .2“ ' = to so mac 1.62 i . i E 2 a W . a . . ; 4° . z _ g 750 3 .54, , «on r 40 ‘ -. an new = mm. «C : mm: ~1- lam = mm. l1: a 10m: 4c“ : 50mm. 4; smz7‘ '" ‘7" chK : soomz,l kHz — N . M rm = lootirix,l ka¥ 40 in. = IWKHXJ mp no In“ = mm, «c : 100": 7 ‘ lcu = 10km, to a mum u.1 m In it '90.” 1.a m twig wig GAIN VI. FASSBAND PHASE SHIFT INPUT FREQUENCY VI. INPUT FREQUENCY 1 , lc , : lo 21m: 129 a .. 2rch :1 5 E ‘ s 'c E 2 2mm 1.62 ' = ‘ , E U : c x hm: 1.1: m 9 V; = tsv : a r. . 254: lm = 112ka in 1.0 'm/‘c «1,0 lVI/lXI/VI 0.1 in mm n.u 1 'ru/«c 12.1 0.2 PASSBAND GAIN w. INPUT FREQUENCY .mo L . j: mo in A 4.x: ‘7: ,c mg m 5 “-0 I . tc mc'm E .10 I . rc a Mania 0 n z : 72.0 l . le 3 mc m 5 4‘0 ‘ , 'c 11m: 1.54 1 , 'c v :75v ‘5’“ 2mic'2u rim-c «so hymn. 0.1 0.3 ".5 0.1 0.91.1 tum: CUTOFF FREQUENCY 10w \E mo a i \ DIVIDER limo >>\\\ cow mmmuc: (nF) "-l FIN 70 Mann \ om DIVIDER RATIO \\\ mum FIN 10 v i 0.01 OJ 1 Ill ‘90 IK IDK '0 (Hz) Z 90 L TXW/OBZXVW
MAX280/MXL 1 062 5th Order, Zero 00 Error, Lowpass Filter Typical Operating Characteristics (continued) uonmuzso OSCILLATOR msousucv rm u. SUPPLY VOLTAGE OSCILLATOR FREQUENCV, AMBIENT TEMPERATURE POWER SUPPLV CURRENT vs. POWER SUPPLY VOLTAGE Iosc vlt , gm Am i i i a r 1250 "‘ ~ v :AGND V ° 3” f\ g ousc=anr : 7 5&an E ‘ 5150 i 5 5 K 1.1 3 g Vusv E 5 nrzsvc g i E \ v :-5v 5 4 ‘ ,E r m 3 4 g \\ E N u a \\ > o . u an: \ E k u". \ 41211 a z a l" a’ G ' E \ 3 50.7 I“ U z 5 1 9 n 13 1s 11 >50 as a 25 so 15 1m 12s 4 s s to 12 14 Is 18 Vsuwur (V) VARIATION OF PASSBAND GAIN WITH TEMPERATURE 1'. = vzs'c ltu/Ic Introduction Figure 1 illustrates the architecture 01 the circuit. The output voltage is sensed through an internal butler, then applied to an internal switched capacitor network which drives the bottom plate ol an external capacitor to term a 5th order Iowpess filter. The input and output appear across an external resistor and the IC part oi the overall filter handles only the AC path of the Slgnal. The DC onsets oi the buffer and the switched capacitor network are blocked by the capa- citor and do not appear at the zero offset output pin. Use at this external resistor and capacitor also auto- matically provides the required anti-aliasing littering tor the sampled filter. Further, low frequency noise in the tiller IC is attenuated by the external capacitor since any noise at the FB pin goes through a highpass path to the Iilter output. The filter output pin is unbuilered. This signal can be buttered by the art-chip buffer or by a high accuracy op amp (such as a I AMEiENr TEMPERATURE [“C) powzn SUPPLV (v; PASSHAND GAIN vs. INPUT FREQUENCY «u v. : 15v n : as": “’3 rcpt = mm: «s 2 lo «:1 I u ’ P n v = I‘ 4" \-_yr -n2 lc \l/Z M 155‘i 4" l m moo as n.5 n.7 use 1.1 rm/Ic chopper stabilized op amp) to obtain a buttered DC accurate system The on—chip butler has an oflsel voltage of 2mV tor the MAX280 and 20mV tor the MXL1062, The oiiset voltage ior both devices have a typical tempco oi lyV/“C. Detailed Description Clock Requirements Using Divider Ratio DIVIDER RATIO sets the ratio between the internal to“ (supplied to the MszeO/quoszi and r (the output at the DIVIDER RATIO pin). Connect OCR/CIDER RATIO to V‘ for a 1/1, to GND tor a 1/2, and to V‘ lor a 1/4 IOLK/IOSC ratio. Using internal Oscillator The internal 140kHz (nominal) oscillator frequency can be modilied by connecting an external capacitor [VI/l XI [VI
5th Order, Zero 06 Error, Lowpass Filter in parallel with the on-chip ”JaF capacitor: from the Cost: pin to GND (or to ' if the capacitor is polarized). The clock frequency can be calculated by: 105C = 140kHz (saw/(33990053) (1) Due to process tolerances. f can vary by i62.5% in the MXL1062. In the MAgsfio, on-chip trimming reduces the to C tolerance to i19l5%l The oscillator frequency canie adlusted by adding a series poten- tiometer between the capacitor and the Case Din as shown in Figure 2. The new frequency can be computed as: "050 = feed 11‘4RCosc'oscl (2) where '05 is the value of the oscillator frequency when R = , When an external potentiometer is Used, the new value of the oscillator frequency is always higher than the one calculated in (equation 1). To achieve a wide tuning range. calculate (equation 1) the ideal 'osc- C sc pair, then double the value of 0050 and use a 56ft potentiometer lo adjust f'osc- For example: to obtain a 1kHz oscillator frequency, 0 5 is 3900pF. Ely using 6800pF for Cosc and a 5&8 potentiometer, the clock frequency can be adjusted from SOOHz to 1‘56kHz, The internal oscillation fre— quency can be measured directly at the Case pin using a low capacitance probed m be wouluTE townss SWITCNED- T' F' Wu 1 NETWORK —> BUFfiRED i 'OUY a oumrr + cut em 5 (anv MAX Vosl 0 so ice” 6 : ml: 4] W '05: Figure 1. Block Diagram Figure 2‘ Externaf Oscillafal Trim lVl/lXI/Vl Using an External clock The internal switched capacitor filter requires a clock 100 times higher than the desired cutoff frequency. If an external clock is used the input on the 0 pin must swi close to the power rails (V‘,V‘)t Afificough standard 7 H000 series CMOS gates do not guarantee CMOS levels with the source and sink currents of the C pin, they will in reality drive the Cosc pin. Cfi8s gates conforming to standard E series output drive have the appropriate voltage levels and current to simultaneously drive several chips. The typical trip levels of the internal Schmitt trigger sensing Cosc pin are: POWER SUPPLY 1|th LEVEL v' = ~2,5v vi Vm = Olav V.L = 415v v‘ : «sov V, v.” = f.4V v.t = v2.1v v' = saw v v.H = 1.7V v.,_ = —2.5v v' = +5,nv v- V.» = 3.4V VIL = 1.35V V‘ = nov V? v.“ = 64v v.L : 2.9V v' : +15v - : (iv v... = 9.5V v.L = 4.1V encoding External [helm and Capacitor Valued The external resistor and capacitor is used as part of a feedback loop for the filter and also forms one pole The internal 4 pole switched capacitor filter is driven by a clock which also determines the filter cutoff frequency. For a maximally flat amplitude response, the clock should be 100 times the desired cutoff frequency and the resiaor and capacitor should be chosen such that: to 1 1.62 ’ 21ch where to = filter cutoff frequency, (—3dB point) For example to implement a 10Hz cutoff filter, a 1kHz clock is required with 1/21rRC = lOHz/1.62 = 6.17HL Typically R is chosen to be around 20kt). The mini- mum value ol Fl depends upon the maximum input signal, and the current sinking capability of the FB pin (typically ImA)V So for 3 1V peak-to-peak signal, the minimum value of the resistor is 1m, The passhand response for values of 1/[21r‘RC) around (lo/1.62) can be seen on the Passband Gain vsl Input Frequency plot (see Typical Operating Characteris- tics; lf maximum flatness is required (as in Butter- worth filters), the RC product should be well con- trolled When the ’nput resistor and capacitor cutoff frequency approaches the cutoff frequency of the on-cnip 4th order filter, response peaking becomes severe as can be seen in the response plots. However the attenuation slope is virtually unaffected by the resistor and capacitor since it is set by internal cir— cuitry, This can be seen in the Galn vs, Input Frequency plot. For wide temperature range applications NPO ceramic capacitors are recommended Their tempcos are around i20ppm and values are available to 0.1pF. Z 90 l TXW/OQZXVW
MAX280/MX L 1 062 5th Order, Zero 06 Error, Lowpass Filter Other ceramic capacitors are not recommended due to their large tempcos. Mylar, polystyrene and poly propylene capacitors all provtde acceptable perfor- mance. Solid tantalum capacitors connected backstoi back and disc ceramic capacitors introduce additional passband errors (DADS-0MB) Applications Information Flltor Input Voltage Range Every node of the filter typically swings within W of both supplies. With the appropriate external re5istor and capacitor values. the amplitude response of all the Internal and external nodes should not exceed a gain of MS with the exception of the FE pin The amplitude response of the FB pin, where some peaking may occur, is shown in Figure 3. For an input lrequency around 0,8lc. the gain is 1.7V/V and, with tSV sup» plies, the peak-lo-peak input voltage should not exceed 4.7V. ll the input voltage goes beyond this value, clipping and distortion of the output wavelorm may occur; however. the lilter will not be damaged. The absolute maximum input voltage to any pin should not exceed the power supplies. Intern-I Buffer The internal output butter of the FB pin and the OUT pin is part of the AC signal path Hence capacitive loading greater than SOpF may cause gain errors in the passband around the cutofl lrequency. The internal buffer can also be used as the tiller output. however, there will be a few millivolts of output oflsett Flltor Attenuation The rolloil is SOdB/octave. When the clock rate is increased and hence the cutoff lrequency is increased, the filters maximum attenuation decreases as shown in the Typical Operating Characteristics. This decrease is caused by rollofl at higher frequencies ot the loop gains of the various internal leedback paths and is not due to any increase in noise lloor. 1,62 Vrn/Viu MB) iz.1 01030.5 1 in liul'c Figure 3. Amplitude Response of F8 Pin 6 Filter Noise The filter wideband noise is typically QOpVfiMs with i5V supplies and typically BOuVRMS lor t25V supplies or a +5V single supply. This value is nearly independent of the cutoff frequency. The noise spectral densrty. unlike conventional active filters, is nearly zero for frequencies below 0.1 to Roughly 2/3 of the entire Wideoand noise is in the band DC to to, "ansiont Response Figure 4A shows the step response oi the tilter. This response approximates that 01 an ideal 5th order maximally llat (Bulterworth) lilter. The ringing in the transient response can be reduced by using a Bessel filter. The Bessel filter response can be approximated by setting 1/21rRC to lc/Z instead off /1,62 Figure 4B shows the step responseof the Besse approximation, Figure 411. Step Response of Butlerwollh Approximation 1 7 to 21m: 152 , (ms/div, 0.5V/div) Figure 49 Stop Response ol Bessel Approximation r [C 2ch 7 2 , (tins/rim, Mir/div.) [VI/l X I IVI
5"! Order, Zero no Error, Lowpass Filter Antl-Allulng The internal 4th order switched capacitor filter is a sampled device and as such will alias unless preceded by a band limited signal. or a continuous non-5am led tilter. The external resistor and capacitor used to arm the 5th lilter pole also automatically provides this lunction. Attenuation is greater than 43dB at the Nyquist lrequency. Single Supply Our-lion Figure 5 shows a schematic for single supply opera- tion. The AGND pin and the OU pin should be biased at 1/2 supply. The value of the resistors R1 and R2 should be chosen to conduct 100ml or more. Fl‘ DC biases the buffer and 0' isolates the bufler from the DC value at the output. Under these conditions the external resistor and capacitor should be adjusted such that (1/21rFlC) = l 1.84. This accounts lor the extra loading at the R , ' combination. R' and C' are not required if the input voltage has a DC value around 1/2 supply. ll an external capacitor is used to activate the internal oscillator, its bottom plate should be tied to syslem ground. The AGND pin should also be bypmed by a decoupling capacitor. Clock Focal-rough Clock teedthrough can be reduced by using a resistor and capacitor at the buttered output pin provided that this pin is used as an output. ll an external op amp is used to buffer the DC accurate output, an input resistor and capacitor can be used to eliminate clock leedthrough (see Figure 6) and further reduce the attenuation liner of the filter. VIM>WI—— —> n u 0 some 7" nmALuu zen VT—E V ZI 3WD fig: —E MAXIM 3—. MAX280 :1,“ «av I: FOR A m; FILTER n = man. 0 = Inf. Io“ : um: Elcut THE FILTER Is MAXIMALLV FLAT FOR —‘— = —'9— 2me 1M R'=12R Figure 5. Single 5v Supply 5m Order LP Filter a: m 2.0x n1 —>Vovr THE m Ia CONNECrEb as A 2nd ORDER um Ann KEV m FILTER wva A ctrerr msouENc’v Emu 'm 11! um THE Anomotw. FILTEIIINO EuulIATEs AM m w FEED man nus nEcIEAsEs THE WIDEIAND NOISE of THE FILTER. ‘ ncmnPutoFFaEnnErEnnEnoncaAmor Io 01""):me m Dc GAIN us m R1 R2 (:1 c2 OUTPUT FILTER COMPONENT VALUEs Ink m an sank zuk Iem aw H.415! If - u am 32“ run aux WIDED‘ND NOISE (REERRED TO A DC GAIN of mm = W Figure 6. 7th Order 1017M: Lawpnas Filler with Continuous OUlpul Filtering, Output Bull‘sring and Gain Adiustment MAXIM Z90 I- TXW/OBZXVW
MAX280/MXL 1 062 5th Order, Zero 00 Error, Lowpass Filter Cascading for Higher Order Fillers Two chips can be cascaded with or without inter- mediate buffers. Figure 7A shows a DC accurate 10th order lowpass lilter. The unbullered output ol the lirst chip directly drives the next stage input. To minimize loading the lirst resistor and capacitor. the next stage R' should be much larger. The recommended ratio ol R/R‘ is 117:1 The values chosen were 1/(21rFiC) = fC/1.57 and 1/(21rR'C'l = l /16, For example. lorl 4.16kHz, fQLK - 416kHZ. : 909G, R' 1 107K), - oioesuF. C = 574pF. For this example the maximum passband error occurs around 0.5lo and is AOIGdB Figure SB corrects lor loading the buflered output when the lirst stage is used to drive the input at the next stage, This introduces a maximum DC error oi 2mV over temperature using the MAXZBO. Now R and R' can be similar in value and the passband gain error is reduced typically —O.15dB. The RC values used were 1/(27rRC) : [0/159 and 1/(27rFl'C') = fc/‘l.64. Culling Notch Fllhr: The MAX280/MXL1062 can be used to create a notch because the frequency, where it exhibits 480° phase shilt. is inside its passband as shown in Figure 8A. It is repeatable and predictable lrom part-to-part. An input signal can be summed with the output ol the lilter to form a notch as shown In Figure 88. The 180° phase shift of the MAX280/MXL1062 occurs at i; K/ 118.3 or 0.85'times the lowpass cutoff frequency For instance to obtain a 60Hz notch, the clock frequency should be 7.098kHz and the input li/2rrRC) should be approximately 70.98Hz/1.63i The optional (RZCZ) at the output filters the clock feedthrough. The 1/21rR262 should be 12—15 times the notch lrequency. The major advantage ol this notch is its wide bandwidth The input frequency range is not limited bv the clock frequency because the MAXZBOIMXUOBZ by itseli does not alias The circuit of Figure 80 is an extension of the pre- vious notch liltelt The input signal is summed with the towpass filter output through A1. as previously described; then, the output of A1 is again summed with the input voltage through A2. R6 = R2 = R3 = R7 and R4 = R5 : 0.5Ft7 the output of A2, at least theoretically, should look e the output of MAXQBO/MXLIoez, the EC.“T pin If the ratio of 255k soda/octave ammrr MAXIMUM ATTENUATION 0.54: mssamn Ennoa, h—AAI‘ DC Acoua V‘” M l :3, l ouwur ATE LE V 3 T—lI V :I 2 MAXIM} 2 MAXIM E, ‘5‘, E Mszao :n _ -5v E: Mszao E ’4: 3 ' - El— W : ¢SV NHL 1011‘ ORDER DC ACCURATE lDW PASS FILTER L» rc“ = IkNx ndB DC GAIN 11MB (1ch IOkHz) imasltcL kHz) 9543(qu - Mm) Figure 7‘, Simple Cascading Technique v... >—~ Vnur c I J 6,1 . V :5. T—E V 34» aurrznen ouwur , MAXIM El— , MAXIM} Mm MAX280 E— = NEE MAXZBO E_ - A El— —E 3— w —> 'CLK Figure 7B Cascading Two MAXQBO/MXL 10625 The 2nd Slaga I: DUI/en by the Buffered OUIDIA 0/ Ihe F/rst Stage. [VI/l XIIVI
5th Order, Zero 06 Error, Lowpass Filter (RS/R5) is slighuy less than 2. a notch is introduced in (he smpband o! lhe filter as shown in Figure SD. The overall fi‘ler response \ooks pseudoelliptic low- pass. The lrequency of the notch is a‘ to me vggge or the resistor ratio (Re/R5) snou'lé to 1. . /47.3 and be equa‘ 7 : L ' znnc 1.73 i “Inc. 1.94 ‘ ,L mac 7 1.13 vow PHASE smrr (DEGREES) . r; we ’ 0.2 0.3 0.4 (1.5 as 0.1 u M 111 "Me Vour/VIN (H!) 1 ro ealno 1k 4w (”1) Figure BA Phase Hespanss or me MAXZEU/MXL 1062 /or Var/Gus Input (H, C)s FIguIs so. Amplitude Response 0/ Ins Filter R1 R4 Vm w R2 R3 .L r c :i: C: Vm" I T—E V 3— ? m:m=m2+na) 4: MAXIM , omoNAL 7 1 o L I? \r ,4: MAX230 3—4 v‘ zmc : mo x 1.5: E. 3—“ CLK m 'NOYCN = 113.: figure 55 Usmg the MAXZSD/MXL 1052 m Cleats a Notch 51 m —| 19.35)! M R, m :21 29.. non 20k : smk VIN N .cl :2: ”F . V E N - 5.: FE MAXIM 2}— V‘ u ””94 E V>._E MA xzao s _ , —> Vouv cu m S“ "W“ - 4 . _'GL 1 mac we no: Figure GO. A Lowpass Filter with a 60Hz Notch [VI/J XI/Vl
MAX280/MXL 1 062 5th Order, Zero 06 Error, Lowpass Filter Application Circuits CONTROL To FIN s or cums mm", 1““ GROUND. " 3v CONNECTING FIN l or THE mm NIGH/ LOW) GROUND/Law THE FILVER cuTcFF FNEnuENCV ‘5‘, Is max/smug“; osv 1m 1'!) FIN 13 or Cums Wflx —5v 100HI, 50H}. 25H: 5"] Order DC Accurate LP Fillsr Vow-1 aurrsnao voun Voun aurrEnEo Vom Vow: BUFFERED err: Oclave Tuning with a Single lnpul Clock Amplitude Response la! the Octave Tuning Circurl AMPLINDE RESPONSE (as; 0.1 I z 5 “NM"! “72040100 10 MAXI/VI
5th Order, Zero Dc Error, Lowpass Filter 0MP Throat-My F3 so“ A s DWIDER Cos: RATIO II.1II" (232mm) go Io www.maxim-ic.comlpackages InIIIII unguiim (Wm mums man—'H“ 1w: :NZYIL mm mm Wfi 11 in“ m.“- m- M” "mllizumr'lfl Lfllw:llflln Em |lass 1H] 8 Lead Plastic DIP (PA) em = 160°C/W 9J0 = 75°C/W [VI/l XI/Vl 11 Z 90 I- TXW/OBZXVW
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
MAX 280/MX L 1 062 5th Order, Zero 00 Error, Lowpass Filter go m Www.maxim-ic.cuml acka es 3:an Hi ' T fin». «mun («—4512 {#11 “films W a Lead csnnw (JA) eJA = 125°C/W 9J5 = 55°C/W Luv n _f— . “5.4M - 41s (vim-1.959) [nu-9.25) ("HIM-11M!) mu mm m kgfilfim. (mm: 75%;; use, — 1 (1-I37-1.M2| m L —’( (Man 4 a. t T 7 —ul PM Ill. f _ 0.3“) _ ‘ mu) ‘z'm'L‘w’ cumin-m5) 16 Lead Small Outline, Wide (WE) eJA = 105°C/W em = 50° C/W Maxrm cannm assuma responsIm/Ily ror use 9/ any :rrcmlry other man ctrcwlry cnlrra/y embadsd m a Maxrm prom/cl No Circurl pawn! hoe/Isa: are Imam Maxml reserves the nng to change ms cucumy and specrflcalvons Mlhoumonce a! any we Maxim [Morn-d Produols, 12a SI" Glhrlal Drive, Sunnyvlll, 0‘ 94096 I408) 737-7500 12 © 1995 MaX|m Integvaled Products Fvinied USA mmm .s a registered {lademavk or Maxxm Integrated Producls,
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)