Fiche technique pour STA540 de STMicroelectronics

This is information on a product in full production.
April 2012 Doc ID 13907 Rev 6 1/25
1
STA540
4 x 13 W dual/quad power amplifier
Datasheet − production data
Features
■High output power capability
– 2x 38 W into 4 Ω at 18 V, 1 kHz, 10% THD
– 2x 34 W into 8 Ω at 22 V, 1 kHz, 10% THD
– 2x 24W into 4Ω at 14.4 V, 1 kHz, 10% THD
– 2x 15 W into 8 Ω at 16 V, 1 kHz, 10% THD
– 4x 13 W into 2 Ω at 15 V, 1 kHz, 10% THD
– 4x 11 W into 4 Ω at 18 V, 1 kHz, 10% THD
– 4x 7 W into 4 Ω at 14.4 V, 1 kHz, 10% THD
■Minimum external components count:
– no bootstrap capacitors
– no Boucherot cells
– internally fixed gain 20 dB
■Standby function (CMOS compatible)
■No audible pop during standby operations
■Diagnostic facilities:
– clip detector
– output to GND short-circuit detector
– output to VS short-circuit detector
– soft short-circuit check at turn-on
– thermal shutdown warning
Protection
■Output AC/DC short circuit
■Soft short-circuit check at turn-on
■Thermal cutoff/limiter to prevent chip from
overheating
■High inductive loads
■ESD
Description
The STA540 is a 4-channel, class-AB audio
amplifier designed for high quality sound
applications.
The amplifiers have single-ended outputs with
integrated short-circuit protection, thermal
protection and diagnostic functions.
The chip is housed in the 15-pin Multiwatt
ECOPACK® Pb-free package which is RoHS
(2002/95/EC) compliant.
Multiwatt15
Table 1. Device summary
Order code Temperature range Package Packing
STA540 -40 to 150° C Multiwatt15 Tube
www.st.com
Contents STA540
2/25 Doc ID 13907 Rev 6
Contents
1 Block diagram and pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Standard application circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4 Electrical characteristics curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5 Thermal information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1 Heatsink specification examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.1.1 Rth_HS calculation for 4 single-ended channels . . . . . . . . . . . . . . . . . . . 15
5.1.2 Rth_HS calculation for 2 single-ended channels plus 1 BTL channel . . . 15
5.1.3 Calculations using music power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6 Practical information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.1 Highly flexible amplifier configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.2 Easy single-ended to bridge transition . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.3 Internally fixed gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.4 Silent turn on/off and muting/standby function . . . . . . . . . . . . . . . . . . . . . 17
6.5 Driving circuit for standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.6 Output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.6.1 Rail-to-rail output voltage swing without bootstrap capacitors . . . . . . . . 18
6.6.2 Absolute stability without external compensation . . . . . . . . . . . . . . . . . 18
6.7 Built–in protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.7.1 Diagnostic facilities (pin 10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.7.2 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.7.3 Clipping detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.7.4 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STA540 Contents
Doc ID 13907 Rev 6 3/25
6.8 Handling the diagnostic information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
6.9 PCB ground layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.10 Mute function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
List of tables STA540
4/25 Doc ID 13907 Rev 6
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Table 3. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 4. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 5. Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 6. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
STA540 List of figures
Doc ID 13907 Rev 6 5/25
List of figures
Figure 1. Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Figure 2. Pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 3. Quadraphonic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 4. Alternative single-ended speaker connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 5. Dual bridge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Figure 6. Stereo plus bridge drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 7. Quiescent drain current versus supply voltage (single-ended and bridge). . . . . . . . . . . . . 12
Figure 8. Quiescent output voltage versus supply voltage (single-ended and bridge). . . . . . . . . . . . 12
Figure 9. Output power versus supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 10. Output power versus supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 11. Output power versus supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 12. Distortion versus output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 13. Distortion versus output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 14. Distortion versus output power . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 15. Output power versus supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 16. Output power versus supply voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 17. Supply voltage rejection versus frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 18. Crosstalk versus frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 19. Standby attenuation versus threshold voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 20. Total power dissipation and efficiency versus output power. . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 21. Total power dissipation and efficiency versus output power. . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 22. The new output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 23. Shared capacitor in single-ended configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 24. Clipping detection waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 25. Output fault waveforms (see Figure 26) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 26. Fault waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 27. Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 28. Interface circuit diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 29. Optional mute function circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 30. Mechanical data and package dimensions (Multiwatt15) . . . . . . . . . . . . . . . . . . . . . . . . . 23
6/25 Doc ID 13907 Flev 6
Block diagram and pin description STA540
6/25 Doc ID 13907 Rev 6
1 Block diagram and pin description
1.1 Block diagram
Figure 1. Block diagram
13
1
+
-
+
-
+
-
+
-
IN1
V
CC2
V
CC1
OUT1
4
ST-BY
SVR P-GND S-GND
7
IN2 5
IN3 12
IN4 11
OUT2
OUT3
OUT4
D06AU1630
DIAGNOSTIC
OUTPUT
2
15
14
10
3
689
A1
A2 INV
A3
A4 INV
ST-BY
DIAGNOSTICD
VCC1VCC2
STA540 Block diagram and pin description
Doc ID 13907 Rev 6 7/25
1.2 Pin description
Figure 2. Pin connection (top view)
Table 2. Pin description
N° Name Type Function
1 OUT1 OUT Channel 1 output
2 OUT2 OUT Channel 2 output
3 VCC1 PWR Power supply
4 IN1 IN Channel 1 input
5 IN2 IN Channel 2 input
6 SVR IN Supply voltage rejection
7 ST-BY IN Standby control pin
8 P-GND PWR Power ground
9 S-GND PWR Signal ground
10 DIAGNOSTICD OUT Diagnostics output
11 IN4 IN Channel 4 input
12 IN3 IN Channel 3 input
13 VCC2 PWR Power supply
14 OUT4 OUT Channel 4 output
15 OUT3 OUT Channel 3 output
1
2
3
4
5
6
7
9
10
11
8
IN4
DIAGNOSTICD
S-GND
PW-GND
STAND-BY
SVR
IN2
IN1
VCC
OUT2
OUT1
13
14
15
12
OUT3
OUT4
VCC
IN3
D06au1631
OUT3
OUT4
VCC2
IN3
IN4
DIAGNOSTICD
S-GND
P-GND
ST-BY
SVR
IN2
IN1
VCC1
OUT2
OUT1
Electrical specifications STA540
8/25 Doc ID 13907 Rev 6
2 Electrical specifications
2.1 Absolute maximum ratings
2.2 Thermal data
2.3 Electrical characteristics
The test conditions are V
S
= 14.4 V, R
L
= 4 Ω, f = 1 kHz, T
amb
= 25° C unless otherwise
specified.
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
Vs
Supply voltage idle mode (no signal) 24 V
Supply voltage operating 22 V
Supply voltage AC-DC short safe 20 V
Ptot Total power dissipation (T
case
= 85 °C) 36 W
Tstg, TjStorage and junction temperature -40 to150 °C
Top Operating temperature 0 to 70 °C
Table 4. Thermal data
Symbol Parameter Value Unit
Rth j-case Thermal resistance junction to case (max) 1.8 °C/W
Rth j-amb Thermal resistance junction to ambient (max) 35 °C/W
Table 5. Electrical characteristics
Symbol Parameter Test condition Min Typ Max Unit
V
S
Supply voltage range 8 22 V
I
d
Total quiescent drain
current 80 150 mA
V
os
Output offset voltage -150 150 mV
P
o
Output power, SE
THD=10%, RL=4 Ω
THD=10%, RL=2 Ω
THD=10%, RL=4 Ω, VS=22 V
6.5 7
11.5
16
W
Output power, BTL
THD=10%, RL=4 Ω
THD=10%, RL=8 Ω, VS=17 V
THD=10%, RL=8 Ω, VS=22 V
21 24
20
34
W
THD Total harmonic distortion R
L
= 4 Ω, Po = 0.1 to 4 W 0.02 %
I
SC
Short-circuit output current 4.0 A
STA540 Electrical specifications
Doc ID 13907 Rev 6 9/25
C
T
Crosstalk
f = 1 kHz single-ended
f = 10 kHz single-ended
f = 1 kHz BTL
f = 10 kHz BTL
55
70
60
60
dB
R
in
Input impedance Single-ended BTL 20
10
30
15 kΩ
G
v
Voltage gain Single-ended BTL 19
25
20
26
21
27 dB
G
v
Voltage gain match 0.5 dB
ENInput noise voltage
Rgen = 0, "A" weighted, S.E.:
Non-inverting channels
Inverting channels
2
5
μV
μV
BTL
Rgen = 0, f = 22 Hz to 22 kHz 3.5 μV
SVR Supply voltage rejection Rgen = 0, f = 300 Hz,
C
SVR
= 470 μF50 dB
ASB Standby attenuation Po = 1 W 80 90 dB
ISB
Current consumption in
standby VST_BY = 0 to 1.5 V 100 μA
VSB
ST-BY IN threshold voltage 1.5 V
ST-BY OUT threshold
voltage 3.5 V
IST-BY Pin ST-BY current Play mode, VST-BY = 5 V 50 μA
Max driving current under fault 5 mA
Icd_off
Clipping detector output
average current d = 1% (*) 90 μA
Icd_on
Clipping detector output
average current d = 5% (*) 160 μA
VDIAGNO
STICD
Saturation voltage on pin
DIAGNOSTICD IDIAGNOSTICD = 1 mA sinking 0.7 V
TWThermal warning 140 °C
TMThermal muting 150 °C
TSThermal shutdown 160 °C
Table 5. Electrical characteristics (continued)
Symbol Parameter Test condition Min Typ Max Unit
Standard application circuits 3 10/25 Standard application c Figure 3. Quadraphonic m m 513v 5—. rL-n J. |__LI ° W: I I w:2 :2“: : :EW INJ 0—22“; ‘2 STA540 m 0+ W JTAEL— fii i ' F'W Figure 4. Alternative single-ende W W .53; m WOHF m Figure 5. Dual bridge e—l % f? on a 3 en _ a :M Doc ID 13907 Flev 6
Standard application circuits STA540
10/25 Doc ID 13907 Rev 6
3 Standard application circuits
Figure 3. Quadraphonic
Figure 4. Alternative single-ended speaker connection
Figure 5. Dual bridge
Suggested applications:
4x 13 W into 2 Ω, at 15 V
4x 11 W into 4 Ω, at 18 V
4x 9 W into 2 Ω, at 12 V
4x 8 W into 4 Ω, at 16 V
4x 5 W into 4 Ω, at 12 V
1
2
3
4
5
6
7
89 10
11
12
13
14
15
1000 µF
220 nF 2200 µF
100 nF
10 µF
10 kΩ
IN_1
OUT_1
VS
ST_BY
47 µF
2200 µF OUT_2
2200 µF OUT_3
2200 µF OUT_4
220 nF
IN_2
220 nF
IN_3
220 nF
IN_4
STA540
1
470μF
2
18
470μF
19
*
The best audio performance is obtained with the configuration where each speaker
has its own DC blocking capacitor. However, if the application allows a little
degradation of the spatial image it is possible to connect a couple of speakers with
only one low-value DC blocking capacitor.
1
2
15
14
Suggested applications:
2x 38 W into 4 Ω, at 18 V, 1 kHz, 10% THD
2x 34 W into 8 Ω, at 22 V, 1 kHz, 10% THD
2x 24 W into 4 Ω, at 14.4 V, 1 kHz, 10% THD
2x 15 W into 8 Ω, at 16 V, 1 kHz, 10% THD
1
2
3
4
5
6
7
89 10
11
12
13
14
15
1000 µF
470 nF
100 nF
10 µF
10 kΩ
IN_L
VS
ST_BY
47 µF
OUT_R
470 nF
IN_R
OUT_L
STA540
STA540 Standard application circuits
Doc ID 13907 Rev 6 11/25
Figure 6. Stereo plus bridge drive
Suggested applications:
2x 9 W into 2 Ω, +1x 18 W into 4 Ω, at 12 V
2x 12 W into 2 Ω, +1x 26 W into 4 Ω, at 14.4 V
2x 8 W into 4 Ω, +1x 16 W into 8 Ω, at 16 V
1
2
3
4
5
6
7
89 10
11
12
13
14
15
1000 µF
220 nF 2200 µF
100 nF
10 µF
10 kΩ
IN_L
OUT_L
VS
ST_BY
47 µF
2200 µF OUT_R
OUT_Bridge
220 nF
IN_R
470 nF
IN_Bridge STA540
I10 105 mu :5 75 10 as 10 II 12 la n v: M I1 ll mu. 1“ Va M mDos) m 0,1 0.0! 0.0m 01254667solcnl2 mm
Electrical characteristics curves STA540
12/25 Doc ID 13907 Rev 6
4 Electrical characteristics curves
Figure 7. Quiescent drain current versus
supply voltage (single-ended and
bridge)
Figure 8. Quiescent output voltage versus
supply voltage (single-ended and
bridge)
Figure 9. Output power versus supply voltage Figure 10. Output power versus supply voltage
Figure 11. Output power versus supply voltage Figure 12. Distortion versus output power
8 9 10 11 12 13 14 15 16 17 18
Vs (V)
0
2
4
6
8
10
12
14
16
18
20 Po (W)
RL= 2 Ω
f= 1 KHz
THD= 10 %
THD= 1 %
SINGLE ENDED
8 9 10 11 12 13 14 15 16 17 18
Vs (V)
0
1
2
3
4
5
6
7
8
9
10
11
12 Po (W)
RL= 4Ω
f= 1 KHz
THD= 10 %
THD= 1 %
SINGLE ENDED
THD (i) BTL vs 4.4 v R-4 ohm 000102 A 55101214151520222426 Paulm / umm‘v \‘\ ‘ w u‘ mmHmmvwwmxw .24 mm. (as) mossTALK m5; 120 100 no 95 5,5 100 : WIAAV w 50 mama so 75 baa-10mm: 1o 70 w as so an m 55 so so 2g ; ' m 01 1 I0 Wmm menu/«Hz:
STA540 Electrical characteristics curves
Doc ID 13907 Rev 6 13/25
Figure 13. Distortion versus output power Figure 14. Distortion versus output power
Figure 15. Output power versus supply voltage Figure 16. Output power versus supply voltage
Figure 17. Supply voltage rejection versus
frequency
Figure 18. Crosstalk versus frequency
0
12
1
2
3
4
5
6
7
8
9
10
11
+8 +2
4
+10 +12 +14 +16 +18 +20 +22
Po(W)
Vs(V)
T.H.D=1%
T.H.D=10%
S.E.
Rl=8ohm
f=1KHz
0
12
1
2
3
4
5
6
7
8
9
10
11
+8 +2
4
+10 +12 +14 +16 +18 +20 +22
Po(W)
Vs(V)
T.H.D=1%
T.H.D=10%
S.E.
Rl=8ohm
f=1KHz
0
35
2.5
5
7.5
10
12.5
15
17.5
20
22.5
25
27.5
30
32.5
+8 +22+10 +12 +14 +16 +18 +20
BTL
Rl=8ohm
f=1KHz
Po(W)
Vs(V)
T.H.D=1%
T.H.D=10%
0
35
2.5
5
7.5
10
12.5
15
17.5
20
22.5
25
27.5
30
32.5
+8 +22+10 +12 +14 +16 +18 +20
BTL
Rl=8ohm
f=1KHz
Po(W)
Vs(V)
T.H.D=1%
T.H.D=10%
ATTENUA'IUN (a) 13 oo 95 so 18 3 1s ‘4 53 12 g 10 fl 5 m as as 5 VH4“ a: RV-AX‘DV‘M 5g 4 mm: no a 5 o :2 «05113215555449; oos‘mzusasnusasnorm Vflflm MM not) w n ‘22?” 555;: \ ’ H "’ 12 7/ "777311 in . ("iiiifimmlm 7177,77,,”“9” 77“: o I \ w | II a muummmauaé’ mm
Electrical characteristics curves STA540
14/25 Doc ID 13907 Rev 6
Figure 19. Standby attenuation versus
threshold voltage
Figure 20. Total power dissipation and
efficiency versus output power
Figure 21. Total power dissipation and
efficiency versus output power
STA540 Thermal information
Doc ID 13907 Rev 6 15/25
5 Thermal information
In order to avoid the intervention of the thermal protection, placed at T
j
=150° C for thermal
muting and T
j
=160° C for thermal shutdown, it is important to calculate the heatsink thermal
resistance, Rth_HS, correctly.
The parameters that influence the calculation are:
●maximum dissipated power for the device (P
d
max)
●maximum thermal resistance junction to case (R
th_j-case
)
●maximum ambient temperature Tamb_max
There is also an additional term that depends on the Iq (quiescent current).
5.1 Heatsink specification examples
5.1.1 Rth_HS calculation for 4 single-ended channels
Given V
S
= 14.4 V, R
L
= 4 Ω x 4 channels, R
th_j-case
= 1.8° C/W, Tamb_max = 50° C and
P
out
= 4 x 7 W then
the maximum power dissipated in the device is:
and the required thermal resistance of the heatsink is:
5.1.2 Rth_HS calculation for 2 single-ended channels plus 1 BTL channel
Given V
S
= 14.4 V, R
L
= 2x 2 Ω (SE) + 1x 4 Ω (BTL), P
out
= 2 x 12 W + 1 x 26 W then
the maximum power dissipated in the device is:
and the required thermal resistance of the heatsink is:
Pdmax NChannel
VCC
2
2Π2RL
--------------------4 2.62 10.5W=⋅=⋅=
Rth_HS
150 Tamb_max
–
Pdmax
----------------------------------------------Rth_j-case
150 50–
10.5
---------------------- 1.8 7.7°C/W=–=–=
Pdmax 2
VCC
2
2Π2RL
--------------------
2VCC
2
Π2RL
-------------------- 25.25 10.5 21W=+⋅=+⋅=
Rth_HS
150 Tamb_max
–
Pdmax
----------------------------------------------Rth_j-case
150 50–
21
---------------------- 1.8 3°C/W=–=–=
Thermal information STA540
16/25 Doc ID 13907 Rev 6
5.1.3 Calculations using music power
The thermal resistance value calculated in each of the two above examples specifies a
heatsink capable of sustaining the maximum dissipated power. Realistically, however, and
as explained in the Application Note (AN1965), the heatsink can be smaller when the
application is musical content.
When music power is considered the resulting dissipation is about 40% less than the
calculated maximum. Thus, smaller or cheaper heatsinks can be employed. The heatsink
thermal resistance values are modified as follows:
for example 5.1.1: 10.5 W - 40% = 6.3 W, thus giving Rth_c-amb = 14° C/W,
for example 5.1.2: 21 W - 40% = 12.6 W, thus giving Rth_c-amb = 6° C/W.
STA540 Practical information
Doc ID 13907 Rev 6 17/25
6 Practical information
6.1 Highly flexible amplifier configuration
The availability of four independent channels makes it possible to accomplish several kinds
of applications ranging from four speakers stereo (F/R) to two-speaker bridge solutions.
When working with single-ended configurations, the polarity of the speakers driven by the
inverting amplifier must be reversed with respect to those driven by non-inverting channels.
This is to avoid phase irregularities causing sound alterations especially during the
reproduction of low frequencies.
6.2 Easy single-ended to bridge transition
The change from single-ended to bridge configuration is made simple by connecting the two
inputs together and also the speaker directly between the two outputs (no need for
additional external components, in fact the output DC blocking capacitors are eliminated).
However, take care to use an inverting/non-inverting amplifier pair.
6.3 Internally fixed gain
The advantages in internally fixing the gain (to 20 dB in single-ended configuration and to
26 dB in bridge configuration) are:
●components and space saving,
●output noise, supply voltage rejection and distortion optimization.
6.4 Silent turn on/off and muting/standby function
The standby mode can be easily activated by means of a CMOS logic level applied to
pin ST-BY through a RC filter.
Under standby conditions, the device is turned off completely (supply current = 1 mA typical,
output attenuation = 80 dB minimum).
All on/off operations are virtually pop-free. Furthermore, at turn-on the device stays in mute
condition for a time determined by the value of the SVR capacitor. This prevents transients,
coming from previous stages, from producing unpleasant acoustic effects at the speakers.
6.5 Driving circuit for standby mode
Some precautions need to be taken when designing the driving circuit for pin 7, ST-BY. For
instance, the pin cannot be directly driven by a voltage source having a current capability
higher than 5 mA. In practical cases a series resistance must be inserted, giving it the
double purpose of limiting the current at pin 7 and to smooth down the standby on/off
transitions. And, when done in combination with a capacitor, prevents output pop.
A capacitor of at least 100 nF from pin 7 to S-GND, with no resistance in between, is
necessary to ensure correct turn-on.
Practical information STA540
18/25 Doc ID 13907 Rev 6
6.6 Output stage
The fully complementary output stage is possible with the power ICV PNP component.
This novel design is based on the connection shown in Figure 22 and allows the full
exploitation of its capabilities. The clear advantages this new approach has over classical
output stages are described in the following sections.
6.6.1 Rail-to-rail output voltage swing without bootstrap capacitors
The output swing is limited only by the V
CEsat
of the output transistors, which are in the
range of 0.3 Ω (R
sat
) each.
Classical solutions adopting composite PNP-NPN for the upper output stage have higher
saturation loss on the top side of the waveform.
This unbalanced saturation causes a significant power reduction. The only way to recover
power includes of the addition of expensive bootstrap capacitors.
6.6.2 Absolute stability without external compensation
With reference to the circuit shown in Figure 22, the low frequency gain V
out
/V
in
is greater
than unity, that is, approximately 1 + R2/R1. The DC output level (VCC / 2) is fixed by an
auxiliary amplifier common to all the channels.
By controlling the amount of this local feedback it is possible to force the loop gain (A*β) to
less than unity at frequency where the phase shift is 180°. This means that the output buffer
is intrinsically stable and not prone to oscillation.
The above feature has been achieved even though there is very low closed-loop gain of the
amplifier.
This contrasts with the classical PNP-NPN stage which makes use of external RC networks,
namely the Boucherot cells, for reducing the gain at high frequencies.
Figure 22. The new output stage
CDUT
STA540 Practical information
Doc ID 13907 Rev 6 19/25
6.7 Built–in protection
6.7.1 Diagnostic facilities (pin 10)
The STA540 is equipped with diagnostic circuitry that is able to detect the following events:
●clipping of the output signal,
●thermal shutdown,
●output fault:
– short circuit to GND,
– short circuit to VS,
– soft short circuit at turn-on.
The event is signalled when the open collector output of pin 10 begins to sink current.
6.7.2 Short-circuit protection
Reliable and safe operation in the presence of all kinds of output short circuit is assured by
the built-in protection. As well as the AC/DC short circuit to GND and to VS, and across the
speaker, there is a soft short-circuit condition, which is signalled on pin 10 (DIAGNOSTICD)
during the turn-on phase, to verify output circuit integrity in order to ensure correct amplifier
operation.
This particular kind of protection acts in such a way as to prevent the device being turned on
(via pin ST-BY) when a resistive path (that is a DC path) less than 16 Ω exists between the
output and GND. This would avoid loud speaker damage should, for example, the output
coupling capacitor develop an internal short circuit.
As mentioned previously, it is important to limit the external current driving pin ST-BY
to 5 mA. The reason is that the associated circuitry is normally disabled with currents
greater than 5 mA.
The soft short-circuit protection is particularly attractive when, in the single-ended
configuration, one capacitor is shared between two outputs (see Figure 23).
Figure 23. Shared capacitor in single-ended configuration
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Practical information STA540
20/25 Doc ID 13907 Rev 6
6.7.3 Clipping detection
Figure 24. Clipping detection waveforms
Current sinking at pin 10 occurs when a certain distortion level is reached at each output.
This function initiates a gain-compression facility whenever the amplifier is overdriven.
6.7.4 Thermal shutdown
With the thermal shutdown feature, the diagnostics output (pin 10) signals the closeness of
the junction temperature to the shutdown threshold. Typically, current sinking at pin 10 starts
approximately 10° C before the shutdown temperature is reached.
Figure 25. Output fault waveforms (see Figure 26)
Figure 26. Fault waveforms
SOFT SHORT
OUT TO Vs SHORT
FAULT DETECTION
CORRECT TURN-ON
OUT TO GND SHORT
t
t
t
ST-BY PIN
VOLTAGE
2V
OUTPUT
WAVEFORM
Vpin 10
CHECK AT TURN-ON
(TEST PHASE)
SHORT TO GND
OR TO Vs
D05AU1603mod
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STA540 Practical information
Doc ID 13907 Rev 6 21/25
6.8 Handling the diagnostic information
As different diagnostic information (clipping detection, output fault, approaching thermal
shutdown) becomes available at pin 10 so the behavior of the signal at this pin changes.
In order to discriminate the event, signal DIAGNOSTICD, pin 10, must be interpreted
correctly. Figure 27 shows a combination of events on the output waveform and the
corresponding output on pin 10.
This events could be diagnosed based on the timing of the output signal on pin 10. For
example, the clip-detector signalling under fault conditions could produce a low level for a
short time. On the other hand, an output short circuit would probably produce a low level for
a much longer time. With these assumptions, an interface circuit based on the one shown in
Figure 28 could differentiate the information and flag the appropriate circuits.
Figure 27. Waveforms
Figure 28. Interface circuit diagram
t
t
t
ST-BY PIN
VOLTAGE
Vs
OUTPUT
WAVEFORM
Vpin 10
WAVEFORM
SHORT TO GND
OR TO Vs
D05AU1604mod
CLIPPING
THERMAL
PROXIMITY
Practical inlormation 6.9 6.10 22/25 PCB ground layout The device has 1wo dislincl ground pins, P7GND (power ground) and S which are disconnecled from each olher al chip level. For superior pe P7GND and S7GND mus1 be conneoled logelher on me PCB by low7r For me PCB7ground configuralion, a s1ar7like arrangemem, where me by me supply7fillering eieclroiylic capaoilor ground, is recommended. such as 1his, al leas1 two separale pa1hs musl be provided, one for P S7GND. The correcl ground assignmenls are as lollows: o on S7GND: 7 slandby capaoilor (pin 7, or any olher slandby drivmg nelwo 7 SVR capacilor (pin 6),1o be placed as close as possible lo 7 inpul signal ground (lrom aolive/passive signal processor sl 0 on P7GND: 7 power supply fillering capacilors for pins 3 and 13. The neg eleolroly1ic capacilor(s) musl be direclly lied lo 1he banery n shouid represem 1he slarling poim for all me ground palhs. Mute function If 1he mule func1ion is desired, H can be implememed on pin 6, SVR, Figure 29. Optional mute function circuit mK Using a differem value for R1 lhan 1he suggesled 3.3 kn, resuils in 1wo dilferem si1ualions: 0 R1 > 3.3 k9: 7 pop noise improvemem, 7 lower mu1e anenualion; 0 R1 < 3.3="" k9:="" 7="" pop="" noise="" degradalion,="" 7="" higher="" mule="" a1lenua1ion.="" doc="" id="" 13907="" flev="" 6="">
Practical information STA540
22/25 Doc ID 13907 Rev 6
6.9 PCB ground layout
The device has two distinct ground pins, P-GND (power ground) and S-GND (signal ground)
which are disconnected from each other at chip level. For superior performance the pins
P-GND and S-GND must be connected together on the PCB by low-resistance tracks.
For the PCB-ground configuration, a star-like arrangement, where the center is represented
by the supply-filtering electrolytic capacitor ground, is recommended. In an arrangement
such as this, at least two separate paths must be provided, one for P-GND and one for
S-GND.
The correct ground assignments are as follows:
●on S-GND:
– standby capacitor (pin 7, or any other standby driving networks),
– SVR capacitor (pin 6), to be placed as close as possible to the device,
– input signal ground (from active/passive signal processor stages)
●on P-GND:
– power supply filtering capacitors for pins 3 and 13. The negative terminal of the
electrolytic capacitor(s) must be directly tied to the battery negative line and this
should represent the starting point for all the ground paths.
6.10 Mute function
If the mute function is desired, it can be implemented on pin 6, SVR, as shown in Figure 29.
Figure 29. Optional mute function circuit
Using a different value for R1 than the suggested 3.3 kΩ, results in two different situations:
●R1 > 3.3 kΩ:
– pop noise improvement,
– lower mute attenuation;
●R1 < 3.3 kΩ:
– pop noise degradation,
– higher mute attenuation.
0.22μF1
DIAGNOSTICS
47
D06AU1632
10μF
10K
ST-BY
IN L
0.47μF
5
IN BRIDGE 12
470μF6
13
1000μF100nF
3
VS
2
15
14
OUT L
8910
OUT
BRIDGE
11
0.22μF
IN R OUT R
2200μF
2200μF
R1 3.3K
R2 10K
MUTE
5V
0
PLAY
V
S
= 10 to 16 V,
mute off: V
SVR
≥ 0.6 to 0.8 V,
mute on: V
SVR
≥ 0.2 V
STA540 Package information
Doc ID 13907 Rev 6 23/25
7 Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK® is an ST trademark.
Figure 30. Mechanical data and package dimensions (Multiwatt15)
OUTLINE AND
MECHANICAL DATA
0016036 J
DIM. mm inch
MIN. TYP. MAX. MIN. TYP. MAX.
A0.197
B 2.65 0.104
C 1.6 0.063
D1 0.039
E 0.49 0.55 0.019 0.022
F 0.66 0.75 0.026 0.030
G 1.02 1.27 1.52 0.040 0.050 0.060
G1 17.5317.7818.030.690 0.700 0.710
H1 19.6 0.772
H2 20.2 0.795
L 21.9 22.2 22.5 0.862 0.874 0.886
L1 21.7 22.1 22.5 0.854 0.870.886
L2 17.65 18.1 0.695 0.713
L317.25 17.5 17.75 0.679 0.689 0.699
L4 10.310.7 10.9 0.406 0.421 0.429
L7 2.65 2.9 0.104 0.114
M 4.25 4.55 4.85 0.167 0.179 0.191
M1 4.735.085.430.186 0.200 0.214
S1.9 2.6 0.075 0.102
S1 1.9 2.6 0.075 0.102
Dia13.65 3.85 0.144 0.152
Multiwatt15 (Vertical)
5
Revision history STA540
24/25 Doc ID 13907 Rev 6
8 Revision history
Table 6. Document revision history
Date Revision Changes
May-2006 1Initial release
Sep-2006 2 Minor non-technical edits
Oct-2007 3
Updated description on page 1
Updated pin naming, numbering in all relevant figures
Minor non-technical edits
21-Jan-2008 4 Updated power specifications on pages 1, 6 and 8
Updated short-circuit output current in Table 5
02-Apr-2012 5
Modified VST-BY to VSB and updated parameters in Table 5: Electrical
characteristics
Updated ECOPACK® text in Section 7: Package information
24-Apr-2012 6 Updated dimension A in Figure 30: Mechanical data and package
dimensions (Multiwatt15)
STA540
Doc ID 13907 Rev 6 25/25
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