MC74HC273A Datasheet by onsemi

7 B 13 DATA D3 \NFUTS 14 17 IE Ii NONINVERTING OUTPUTS cmcx RESET Design Criteria Value Units iniemai Gale Counr 65 ea iniemai Gale Pmpagalian Delay 1 5 n5 iniemai Gale Power Dissipaiion 5 o “W Speed Power Product .0075 pJ ‘Equivalem lo a Iwaiiripul NAND gaie, n smwdum eammm induslnes. in 2mm October, 2015 _ Rev. 11 1 ON Semiconductor® Q "mummy. flflflflflflflflflfl A o o LEW HHHHHHHHH HHHHHHHHHH (No I f L '\_ Seedeia dimensm
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 17 1Publication Order Number:
MC74HC273A/D
MC74HC273A
Octal D Flip-Flop with
Common Clock and Reset
High−Performance Silicon−Gate CMOS
The MC74HC273A is identical in pinout to the LS273. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device consists of eight D flip−flops with common Clock and
Reset inputs. Each flip−flop is loaded with a low−to−high transition of
the Clock input. Reset is asynchronous and active low.
Features
•Output Drive Capability: 10 LSTTL Loads
•Outputs Directly Interface to CMOS, NMOS and TTL
•Operating Voltage Range: 2.0 to 6.0 V
•Low Input Current: 1.0 mA
•High Noise Immunity Characteristic of CMOS Devices
•In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
•Chip Complexity: 264 FETs or 66 Equivalent Gates
•NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
•These Devices are Pb−Free, Halogen Free and are RoHS Compliant
LOGIC DIAGRAM
DATA
INPUTS
D0
11
CLOCK
D1
D2
D3
D4
D5
D6
D7 18
17
14
13
8
7
4
3
1
RESET
19
Q0
Q1
Q2
Q3
Q4
Q5
Q6
Q7
16
15
12
9
6
5
2
PIN 20 = VCC
PIN 10 = GND
NONINVERTING
OUTPUTS
Design Criteria Value Units
Internal Gate Count* 66 ea
Internal Gate Propagation Delay 1.5 ns
Internal Gate Power Dissipation 5.0 mW
Speed Power Product .0075 pJ
*Equivalent to a two−input NAND gate.
www.onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MARKING DIAGRAMS
A = Assembly Location
WL, L = Wafer Lot
YY, Y = Year
WW, W = Work Week
G or G= Pb−Free Package
(Note: Microdot may be in either location)
SOIC−20
DW SUFFIX
CASE 751D
TSSOP−20
DT SUFFIX
CASE 948E
PIN ASSIGNMENT
1
20
HC273A
AWLYYWWG
HC
273A
ALYWG
G
20
1
SOIC−20 TSSOP−20
Q2
D1
D0
Q0
RESET
GND
Q3
D3
D2
Q1 5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Q6
D6
D7
Q7
VCC
CLOCK
Q4
D4
D5
Q5
FUNCTION TABLE
Inputs Output
Reset Clock D Q
LXX L
HHH
HLL
H L X No Change
H X No Change
MC74HC273A
www.onsemi.com
2
MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC DC Supply Voltage (Referenced to GND) –0.5 to +7.0 V
Vin DC Input Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
Vout DC Output Voltage (Referenced to GND) –0.5 to VCC + 0.5 V
Iin DC Input Current, per Pin ±20 mA
Iout DC Output Current, per Pin ±25 mA
ICC DC Supply Current, VCC and GND Pins ±50 mA
PDPower Dissipation in Still Air, SOIC Package†
TSSOP Package† 500
450 mW
Tstg Storage Temperature –65 to +150 °C
TLLead Temperature, 1 mm from Case for 10 Seconds
SOIC or TSSOP Package 260
°C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of
these limits are exceeded, device functionality should not be assumed, damage may occur and
reliability may be affected.
†Derating: SOIC Package: –7 mW/°C from 65° to 125°C
TSSOP Package: −6.1 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol Parameter Min Max Unit
VCC DC Supply Voltage (Referenced to GND) 2.0 6.0 V
Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND) 0 VCC V
TAOperating Temperature, All Package Types –55 +125 °C
tr, tfInput Rise and Fall Time VCC = 2.0 V
(Figure 1) VCC = 4.5 V
VCC = 6.0 V
0
0
0
1000
500
400
ns
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol Parameter Test Conditions VCC
V–55 to
25°Cv 85°Cv 125°C Unit
VIH Minimum High−Level Input Voltage Vout = VCC – 0.1 V
|Iout| v 20 mA2.0
3.0
4.5
6.0
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
1.5
2.1
3.15
4.2
V
VIL Maximum Low−Level Input Voltage Vout = 0.1 V
|Iout| v 20 mA2.0
3.0
4.5
6.0
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
0.5
0.9
1.35
1.8
V
VOH Minimum High−Level Output
Voltage Vin = VIH
|Iout| v 20 mA2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIH |Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
VOL Maximum Low−Level Output
Voltage Vin = VIL
|Iout| v 20 mA2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
Vin = VIL |Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.4
0.4
0.4
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this high−impedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
MC74HC273A
www.onsemi.com
3
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Guaranteed Limit
Symbol Unitv 125°Cv 85°C
–55 to
25°C
VCC
V
Test ConditionsParameter
Iin Maximum Input Leakage Current Vin = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 mA
ICC Maximum Quiescent Supply
Current (per Package) Vin = VCC or GND
Iout = 0 mA6.0 4.0 40 160 mA
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbo
l
Parameter VCC
V
Guaranteed Limit
Unit
–55 to
25°Cv 85°Cv 125°C
fmax Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 4) 2.0
3.0
4.5
6.0
6.0
15
30
35
5.0
10
24
28
4.0
8.0
20
24
MHz
tPLH
tPHL
Maximum Propagation Delay, Clock to Q
(Figures 1 and 4) 2.0
3.0
4.5
6.0
145
90
29
25
180
120
36
31
220
140
44
38
ns
tPHL Maximum Propagation Delay, Reset to Q
(Figures 2 and 4) 2.0
3.0
4.5
6.0
145
90
29
25
180
120
36
31
220
140
44
38
ns
tTLH
tTHL
Maximum Output Transition Time, Any Output
(Figures 1 and 4) 2.0
3.0
4.5
6.0
75
27
15
13
95
32
19
16
110
36
22
19
ns
Cin Maximum Input Capacitance 10 10 10 pF
CPD Power Dissipation Capacitance (Per Enabled Output)*
Typical @ 25°C, VCC = 5.0 V
pF
48
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.
TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbo
l
Parameter Figure VCC
Volts
Guaranteed Limit
Unit
–55 to 25°Cv 85°Cv 125°C
Min Max Min Max Min Max
tsu Minimum Setup Time, Data to Clock 3 2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
thMinimum Hold Time, Clock to Data 3 2.0
3.0
4.5
6.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
3.0
ns
trec Minimum Recovery Time, Reset Inactive to
Clock 2 2.0
3.0
4.5
6.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
5.0
ns
twMinimum Pulse Width, Clock 1 2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
MC74HC273A
www.onsemi.com
4
TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbol Unit
MaxMinMaxMinMaxMin
VCC
Volts
FigureParameter
twMinimum Pulse Width, Reset 2 2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
tr, tfMaximum Input Rise and Fall Times 1 2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns
MC74HC273A
www.onsemi.com
5
SWITCHING WAVEFORMS
Figure 1.
CLOCK
Q
trtf
VCC
GND
90%
50%
10%
90%
50%
10%
tPLH tPHL
tTLH tTHL
50%
DATA
CLOCK
VCC
Figure 2.
VALID
GND
*Includes all probe and jig capacitance
CL*
TEST POINT
DEVICE
UNDER
TEST
OUTPUT
Figure 3.
tw
1/fmax
VCC
GND
tsu th
50%
RESET
Q
CLOCK
tw
50%
50%
50%
VCC
GND
VCC
GND
tPHL
Figure 4. Test Circuit
trec
Figure 5. Expanded Logic Diagram
C
DR
Q
D0 32Q0
C
DR
Q
D1 45Q1
C
DR
Q
D2 76Q2
C
DR
Q
D3 89Q3
C
DR
Q
D4 13 12 Q4
C
DR
Q
D5 14 15 Q5
C
DR
Q
D6 17 16 Q6
C
DR
Q
D7 18 19 Q7
11
1
DATA
INPUTS
NONINVERTING
OUTPUTS
MC74HC273A
www.onsemi.com
6
ORDERING INFORMATION
Device Package Shipping†
MC74HC273ADWG SOIC−20 WB
(Pb−Free) 38 Units / Rail
MC74HC273ADWR2G SOIC−20 WB
(Pb−Free) 1000 / Tape & Reel
NLV74HC273ADWR2G* SOIC−20 WB
(Pb−Free) 1000 / Tape & Reel
MC74HC273ADTG TSSOP−20
(Pb−Free) 75 Units / Rail
MC74HC273ADTR2G TSSOP−20
(Pb−Free) 2500 / Tape & Reel
NLV74HC273ADTR2G* TSSOP−20
(Pb−Free) 2500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
0N Semiwndudw" m +444444444+rqg F\ HHHHHHHHHHT 67$ <> L, \ , HHHHHHHHHH FR; _-I-® E 4 4L? HHHHHHHHHH fiafinuu‘unmuj’ O 7 ‘ 7 HHHHHHHHHH uuuummnDDL +1 k
SOIC−20 WB
CASE 751D−05
ISSUE H
DATE 22 APR 2015
SCALE 1:1
20
1
11
10
b20X
H
c
L
18X A1
A
SEATING
PLANE
q
hX 45_
E
D
M
0.25 M
B
M
0.25 S
AS
B
T
eT
B
A
DIM MIN MAX
MILLIMETERS
A2.35 2.65
A1 0.10 0.25
b0.35 0.49
c0.23 0.32
D12.65 12.95
E7.40 7.60
e1.27 BSC
H10.05 10.55
h0.25 0.75
L0.50 0.90
q0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
__
XXXXX = Specific Device Code
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
GENERIC
MARKING DIAGRAM*
20
1
XXXXXXXXXXX
XXXXXXXXXXX
AWLYYWWG
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
11.00
20X
0.52
20X
1.30
1.27
DIMENSIONS: MILLIMETERS
1
PITCH
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
RECOMMENDED
10
20 11
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASB42343B
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
SOIC−20 WB
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
HHHHHHHHHH A -I 07 #— T r “ -T— SEATING PLANE :I :I :I :| Eli :I \:| \:| \:| \:| HR 0N Semiwndudw" TEs DTNENsToNTNs AN ANsT w 5M Tm CONTROLUNG DTMENsToN NTLL DTNENsToN A DOES NoT mow HASH FROTRUSIONS 0R eAT MOLD ELAsH 0R GATE DURRs ExcEED u T5 (a cue» FER SIDE DTNENsToN a DOES NoT INCLUDE TNTERLEAD FLASH 0R RRoTRusToN TNTERLEAD FLASH 0R RRoTRusToN SHALL NoT ExcEED u 25 (a mu» PE DTNENsToN K DOES NoT INCLUDE DAMEAR RRoTRusToN ALLOWAELE DAMEAR RRoTRusToN SHALL BE 0 03 (u may TOTAL TN EXCESS 0E THE K DTNENsToN AT MAxTMuM MATERTAL coNDmoN TERNTNAL NUMEERS ARE SHOWN FOR REFERENCE ONLV DTNENsToN A AND a ARE To BE DETERMTNED AT DATUM PLANE w UUHHHHHHHU IIILLIMEYERS mm: um mu m mm m A a an n 25s a u no u so n ‘59 n m c t 2n u an n n as a T5 in m in mm r n so u 75 n can n can a u 65 350 n ms 558 n n 27 n :7 n rm in ms A n as a 2n in mm in mm .11 n as a us in mm in mm K a T9 n an in am it m2 KI a T9 n 15 in am in am |. s m 350 u 252 558 M n ” \ a " n ’ \ a ’ HHHHHHHHH O HHHHHHHHH ON Semaanuueum and are lvademavks av Semaanauexar Campunenls lndusmes LLC dba oN Semaanauexar Dr us suasmanes Tn xne Dnueu sxaxes andJm mhev aaumnes ON Semaanauexar vesewes me th| to make changes mnauu Yunhev mouse to any amuuns havem oN SemTaanuuaun makes m7 wavvamy represenlalmn m guarantee regardmg the sumahmh/ av TL; manuals can any pamcu‘av purpase nnv dues ON Semumnduclm assume any Mammy ansmg auuac xne apphcahan m use no any pmduclnv mum anu saeamcauy mseTaTms any and au Mammy mcmdmg leth hmms‘mn speaaT cansequenha‘ m \nmdenla‘ damages oN Sennmnauexar dues nnl aanuey any hcense under Ms pa|em thls nan xne nams av amers
TSSOP−20 WB
CASE 948E
ISSUE D
DATE 17 FEB 2016
SCALE 2:1
DIM
A
MIN MAX MIN MAX
INCHES
6.60 0.260
MILLIMETERS
B4.30 4.50 0.169 0.177
C1.20 0.047
D0.05 0.15 0.002 0.006
F0.50 0.75 0.020 0.030
G0.65 BSC 0.026 BSC
H0.27 0.37 0.011 0.015
J0.09 0.20 0.004 0.008
J1 0.09 0.16 0.004 0.006
K0.19 0.30 0.007 0.012
K1 0.19 0.25 0.007 0.010
L6.40 BSC 0.252 BSC
M0 8 0 8
____
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A DOES NOT INCLUDE MOLD
FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH OR GATE BURRS SHALL NOT
EXCEED 0.15 (0.006) PER SIDE.
4. DIMENSION B DOES NOT INCLUDE
INTERLEAD FLASH OR PROTRUSION.
INTERLEAD FLASH OR PROTRUSION
SHALL NOT EXCEED 0.25 (0.010) PER SIDE.
5. DIMENSION K DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.08
(0.003) TOTAL IN EXCESS OF THE K
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. TERMINAL NUMBERS ARE SHOWN FOR
REFERENCE ONLY.
7. DIMENSION A AND B ARE TO BE
DETERMINED AT DATUM PLANE −W−.
110
1120
PIN 1
IDENT
A
B
−T−
0.100 (0.004)
C
DGH
SECTION N−N
K
K1
JJ1
N
N
M
F
−W−
SEATING
PLANE
−V−
−U−
S
U
M
0.10 (0.004) V S
T
20X REFK
L
L/2
2X
S
U0.15 (0.006) T
DETAIL E
0.25 (0.010)
DETAIL E
6.40 0.252
--- ---
S
U0.15 (0.006) T
GENERIC
MARKING DIAGRAM*
XXXX
XXXX
ALYWG
G
7.06
16X
0.36 16X
1.26
0.65
DIMENSIONS: MILLIMETERS
1
PITCH
SOLDERING FOOTPRINT
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G= Pb−Free Package
*This information is generic. Please refer to
device data sheet for actual part marking.
Pb−Free indicator, “G” or microdot “ G”,
may or may not be present.
(Note: Microdot may be in either location)
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically
disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the
rights of others.
98ASH70169A
DOCUMENT NUMBER:
DESCRIPTION:
Electronic versions are uncontrolled except when accessed directly from the Document Repository.
Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.
PAGE 1 OF 1
TSSOP−20 WB
© Semiconductor Components Industries, LLC, 2019 www.onsemi.com
a a e lrademavks av Semxcunduclm Cnmvnnems In "sine \ghlsmanumhernlpalems \rademavks Dav www menu cumrsuerguwaxem Mavkmg gm 9 www nnserm cum
www.onsemi.com
1
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.
ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent
coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.
ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,
regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer
application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not
designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification
in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized
application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such
claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This
literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
TECHNICAL SUPPORT
North American Technical Support:
Voice Mail: 1 800−282−9855 Toll Free USA/Canada
Phone: 011 421 33 790 2910
LITERATURE FULFILLMENT:
Email Requests to: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Europe, Middle East and Africa Technical Support:
Phone: 00421 33 790 2910
For additional information, please contact your local Sales Representative
◊