ADM488,489 Datasheet by Analog Devices Inc.

ANALOG DEVICES flm
Full-Duplex, Low Power,
Slew Rate Limited, EIA RS-485 Transceivers
ADM488/ADM489
Rev. D
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
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One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 www.analog.com
Fax: 781.461.3113 ©2006 Analog Devices, Inc. All rights reserved.
FEATURES
Meets EIA RS-485 and RS-422 standards
250 kbps data rate
Single 5 V ± 10% supply
−7 V to +12 V bus common-mode range
12 kΩ input impedance
2 kV EFT protection meets IEC1000-4-4
High EM immunity meets IEC1000-4-3
Reduced slew rate for low EM interference
Short-circuit protection
Excellent noise immunity
30 μA supply current
APPLICATIONS
Low power RS-485 and RS-422 systems
DTE-DCE interface
Packet switching
Local area networks
Data concentration
Data multiplexers
Integrated services digital network (ISDN)
GENERAL DESCRIPTION
The ADM488 and ADM489 are low power, differential line
transceivers suitable for communication on multipoint bus
transmission lines. They are intended for balanced data
transmission and comply with both Electronics Industries
Association (EIA) RS-485 and RS-422 standards. Both products
contain a single differential line driver and a single differential
line receiver, making them suitable for full-duplex data transfer.
The ADM489 contains an additional receiver and driver enable
control.
The input impedance is 12 kΩ, allowing 32 transceivers to be
connected on the bus.
The ADM488/ADM489 operate from a single 5 V ± 10% power
supply. Excessive power dissipation caused by bus contention or
output shorting is prevented by a thermal shutdown circuit.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
FUNCTIONAL BLOCK DIAGRAMS
ADM488
R
D
RO
DI
A
B
Z
Y
00079-001
Figure 1.
ADM489
R
D
RO
DI
A
B
Z
Y
DE
RE
00079-002
Figure 2.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating).
The ADM488/ADM489 are fabricated on BiCMOS, an
advanced mixed technology process combining low power
CMOS with fast switching bipolar technology.
The ADM488/ADM489 are fully specified over the industrial
temperature range and are available in PDIP, SOIC, and TSSOP
packages.
ADM488/ADM489
Rev. D | Page 2 of 16
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description......................................................................... 1
Functional Block Diagrams............................................................. 1
Specifications..................................................................................... 3
Timing Specifications .................................................................. 4
Absolute Maximum Ratings............................................................ 5
ESD Caution.................................................................................. 5
Pin Configurations and Function Descriptions ........................... 6
Test Circuits................................................................................... 7
Switching Characteristics ............................................................ 8
Typical Performance Characteristics ............................................. 9
Theory of Operation ...................................................................... 11
EFT Transient Protection Scheme ........................................... 11
Fast Transient Burst Immunity (IEC1000-4-4)...................... 11
Radiated Immunity (IEC1000-4-3) ......................................... 12
EMI Emissions............................................................................ 13
Conducted Emissions................................................................ 13
Application Information................................................................ 14
Differential Data Transmission ................................................ 14
Cable and Data Rate................................................................... 14
Outline Dimensions ....................................................................... 15
Ordering Guide .......................................................................... 16
REVISION HISTORY
4/06—Rev. C to Rev. D
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
11/04—Rev. B to Rev. C
Updated Format..................................................................Universal
Changes to Receiving Truth Table Inputs Data Section............ 11
Renamed General Information to Theory of Operation........... 12
Updated Outline Dimensions....................................................... 15
Changes to Ordering Guide .......................................................... 16
5/01—Rev. A to Rev. B
Changes to Absolute Maximum Ratings Section......................... 3
3/01—Rev. 0 to Rev. A
Changes to ESD Specification, Absolute Maximum Ratings...... 3
6/97—Revision 0: Initial Version
ADM488/ADM489
Rev. D | Page 3 of 16
SPECIFICATIONS
VCC = 5 V ± 10%. All specifications TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Differential Output Voltage, VOD 5.0 V R = ∞, see Figure 6
2.0 5.0 V VCC = 5 V, R = 50 Ω (RS-422), see Figure 6
1.5 5.0 V R = 27 Ω (RS-485), see Figure 6
1.5 5.0 V VTST = –7 V to +12 V, see Figure 7, VCC = 5 V ± 5%
Δ|VOD| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω, see Figure 6
Common-Mode Output Voltage, VOC 3 V R = 27 Ω or 50 Ω, see Figure 6
Δ|VOC| for Complementary Output States 0.2 V R = 27 Ω or 50 Ω
Output Short-Circuit Current (VOUT = High) 250 mA −7 V ≤ VO ≤ +12 V
Output Short-Circuit Current (VOUT = Low) 250 mA −7 V ≤ VO ≤ +12 V
CMOS Input Logic Threshold Low, VINL 1.4 0.8 V
CMOS Input Logic Threshold High, VINH 2.0 1.4 V
Logic Input Current (DE, DI) ±1.0 μA
RECEIVER
Differential Input Threshold Voltage, VTH −0.2 +0.2 V −7 V ≤ VCM ≤ +12 V
Input Voltage Hysteresis, Δ VTH 70 mV VCM = 0 V
Input Resistance 12 kΩ −7 V ≤ VCM ≤ +12 V
Input Current (A, B) 1 mA VIN = 12 V
−0.8 mA VIN = –7 V
Logic Enable Input Current (RE) ±1 μA
CMOS Output Voltage Low, VOL 0.4 V IOUT = +4.0 mA
CMOS Output Voltage High, VOH 4.0 V IOUT = −4.0 mA
Short-Circuit Output Current 7 85 mA VOUT = GND or VCC
Three-State Output Leakage Current ±1.0 μA 0.4 V ≤ VOUT ≤ +2.4 V
POWER SUPPLY CURRENT Outputs unloaded, receivers enabled
ICC 30 60 μA DE = 0 V (disabled)
37 74 μA DE = 5 V (enabled)
ADM488/ADM489
Rev. D | Page 4 of 16
TIMING SPECIFICATIONS
VCC = 5 V ± 10%. All specifications TMIN to TMAX, unless otherwise noted.
Table 2.
Parameter Min Typ Max Unit Test Conditions/Comments
DRIVER
Propagation Delay Input to Output, TPLH, TPHL 250 2000 ns
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
Driver O/P to OP, TSKEW 100 800 ns
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
Driver Rise/Fall Time, TR, TF 250 2000 ns
RL Differential = 54 Ω, CL1 = CL2 = 100 pF,
see Figure 10
Driver Enable to Output Valid 250 2000 ns RL = 500 Ω, CL = 100 pF, see Figure 7
Driver Disable Timing 300 3000 ns RL = 500 Ω, CL = 15 pF, see Figure 7
Data Rate 250 kbps
RECEIVER
Propagation Delay Input to Output, TPLH, TPHL 250 2000 ns CL = 15 pF, see Figure 10
Skew |TPLH − TPHL| 100 ns
Receiver Enable, TEN1 10 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 9
Receiver Disable, TEN2 10 50 ns RL = 1 kΩ, CL = 15 pF, see Figure 9
Data Rate 250 kbps
WARNING!
ADM488/ADM489
Rev. D | Page 5 of 16
ABSOLUTE MAXIMUM RATINGS
TA = 25°C, unless otherwise noted.
Table 3.
Parameter Rating
VCC 7 V
Inputs
Driver Input (DI) −0.3 V to VCC + 0.3 V
Control Inputs (DE, RE) −0.3 V to VCC + 0.3 V
Receiver Inputs (A, B) −14 V to +14 V
Outputs
Driver Outputs −14 V to +12.5 V
Receiver Output −0.5 V to VCC + 0.5 V
Power Dissipation 8-Lead PDIP 700 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 8-Lead SOIC 520 mW
θJA, Thermal Impedance 110°C/W
Power Dissipation 14-Lead PDIP 800 mW
θJA, Thermal Impedance 140°C/W
Power Dissipation 14-Lead SOIC 800 mW
θJA, Thermal Impedance 120°C/W
Power Dissipation 16-Lead TSSOP 800 mW
θJA, Thermal Impedance 150°C/W
Operating Temperature Range
Industrial (A Version) −40°C to +85°C
Storage Temperature Range −65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
Vapor Phase (60 sec) 215°C
Infrared (15 sec) 220°C
ESD Association S5.1 HBM Standard 3 kV
EFT Rating, IEC1000-4-4 2 kV
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
ADM488/AIJM489 PIN CONFIGURATIONS A WWII—HT ULILILI Table 4‘ ADM488 Pin Function Des Pin No. Mnemonic Descrip‘i 1 v“ Power Sup 2 R0 ReceiverO 3 DI Dnver lnp 4 GND Ground Co 5 v Noninven 5 z Inverting 7 a Invemng s A Noninven "0 E j E 3 R E :l E :l E j E j E j m: = No couuscr
ADM488/ADM489
Rev. D | Page 6 of 16
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
CC 1
RO
2
DI
3
GND
4
A
8
B
7
Z
6
Y
5
ADM488
TOP VIEW
(Not to Scale)
00079-003
Figure 3. ADM488 8-Lead PDIP/SOIC Pin Configuration
Table 4. ADM488 Pin Function Descriptions
Pin No. Mnemonic Description
1 VCC Power Supply, 5 V ± 10%.
2 RO Receiver Output. When A > B by 200 mV, RO = high. If A < B by 200 mV, RO = low.
3 DI Driver Input. A logic low on DI forces Y low and Z high, while a logic high on DI forces Y high and Z low.
4 GND Ground Connection, 0 V.
5 Y Noninverting Driver, Output Y.
6 Z Inverting Driver, Output Z.
7 B Inverting Receiver, Input B.
8 A Noninverting Receiver, Input A.
NC
1
RO
2
RE
3
DE
4
V
CC
14
NC
13
A
12
B
11
DI
5
GND
6
GND
7
Z
10
Y
9
NC
8
NC = NO CONNECT
ADM489
TOP VIEW
(Not to Scale)
00079-004
Figure 4. ADM489 14-Lead PDIP/SOIC Pin Configuration
1
2
3
4
5
6
7
8
NC = NO CONNECT
16
15
14
13
12
11
10
9
NC
RO
RE
GND
DI
DE
V
CC
A
B
NC
NC
GND NC
Y
Z
NC
ADM489
TOP VIEW
(Not to Scale)
00079-005
Figure 5. ADM489 16-Lead TSSOP Pin Configuration
Table 5. ADM489 Pin Function Descriptions
PDIP/SOIC
Pin No.
TSSOP
Pin No.
Mnemonic
Description
1, 8, 13 2, 9, 10, 13,
16
NC No Connect. No connections are required to this pin.
2 3 RO
Receiver Output. When enabled, if A > B by 200 mV then RO = high. If A < B by 200 mV then
RO = low.
3 4
RE Receiver Output Enable. A low level enables the receiver output, RO. A high level places it in a
high impedance state.
4 5 DE
Driver Output Enable. A high level enables the driver differential outputs, Y and Z. A low level
places it in a high impedance state.
5 6 DI
Driver Input. When the driver is enabled, a logic low on DI forces Y low and Z high, while a logic
high on DI forces Y high and Z low.
6, 7 7, 8 GND Ground Connection, 0 V.
9 11 Y Noninverting Driver, Output Y.
10 12 Z Inverting Driver, Output Z.
11 14 B Inverting Receiver, Input B.
12 15 A Noninverting Receiver, Input A.
14 1 VCC Power Supply, 5 V ± 10%.
ADM488/ADM489
Rev. D | Page 7 of 16
TEST CIRCUITS
V
OC
R
R
V
OD
00079-019
Figure 6. Driver Voltage Measurement Test Circuit
V
TST
60Ω
375Ω
375Ω
V
OD3
0
0079-020
Figure 7. Driver Enable/Disable Test Circuit
R
L
S1 S2
V
CC
A
B
0
V OR 3V
DE IN
DE
C
L
V
OUT
00079-021
Figure 8. Driver Voltage Measurement Test Circuit 2
RE
RE IN
–1.5V
+1.5V
S1
RL
S2
V
CC
CL
VOUT
0
0079-022
Figure 9. Receiver Enable/Disable Test Circuit
RL
DIFF
C
L1
C
L2
DR
RO
A
B
DI
3
V
DE
Y
Z
RE
0
0079-023
Figure 10. Driver/Receiver Propagation Delay Test Circuit
ADM488/ADM489
Rev. D | Page 8 of 16
SWITCHING CHARACTERISTICS
–VO
VO
1/2VO
0V
3
V
1.5V 1.5V
T
PLH
T
SKEW
+VO
0V
90% POINT
10% POINT
90% POINT
10% POINT
T
PHL
B
A
T
SKEW
T
R
T
F
00079-006
Figure 11. Driver Propagation Delay, Rise/Fall Timing
T
PLH
T
PHL
0V 0V
1.5V 1.5V
A–B
RO
V
OL
V
OH
A–B
00079-007
Figure 12. Receiver Propagation Delay
T
ZH
1.5V
DE 1.5V
3
V
0V
2.3V
T
HZ
V
OH
0V
A, B
T
ZL
2.3V
T
LZ
V
OL
A, B
V
OL
+0.5V
V
OH
–0.5V
00079-008
Figure 13. Driver Enable/Disable Timing
1.5V 1.5V
3
V
0V
1.5V
0V
R
1.5VR
O/P LOW
O/P HIGH
RE
V
OL
+0.5V
V
OH
–0.5V
V
OL
V
OH
T
ZL
T
ZH
T
LZ
T
HZ
00079-009
Figure 14. Receiver Enable/Disable Timing
ADM488/ADM489
Rev. D | Page 9 of 16
TYPICAL PERFORMANCE CHARACTERISTICS
40
35
0
1.0 1.5
20
15
10
5
30
25
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
0 0.5 2.0 2.5
00079-010
Figure 15. Output Current vs. Receiver Output Low Voltage
3.4 3.6 5.03.8 4.0 4.2 4.4 4.6 4.8
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
–20
–10
–5
0
–15
0
0079-011
Figure 16. Output Current vs. Receiver Output High Voltage
0.5 1.0 1.5 2.0 2.5
90
80
0
40
30
20
10
70
50
60
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
03.0
00079-012
Figure 17. Output Current vs. Driver Output Low Voltage
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
0
–10
–90
–50
–60
–70
–80
–20
–40
–30
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
05
00079-013
.0
Figure 18. Output Current vs. Driver Output High Voltage
80
0
70
40
30
20
10
60
50
OUTPUT VOLTAGE (V)
OUTPUT CURRENT (mA)
00.5 4.5
1.0 1.5 2.0 3.0 3.5 4.0
2.5
00079-014
Figure 19. Output Current vs. Driver Differential Output Voltage
10
0%
100
90
T
T
T
RO
DI
00079-015
Figure 20. Driving 4000 Ft. of Cable
Milli-HM
ADM488/ADM489
Rev. D | Page 10 of 16
10
0%
100
90
10dB/DI
V
500kHz/DIV05MHz
0
0079-016
Figure 21. Driver Output Waveform and FFT Plot Transmitting at 150 kHz
80
70
60
50
40
30
20
10
0
FREQUENCY (MHz)
dB (µV)
30 200
LIMIT
00079-017
Figure 22. Radiated Emissions
0.3 0.6 161030
80
0
70
40
30
20
10
60
50
LIMIT
log FREQUENCY (0.15–30) (MHz)
dB (µV)
3
00079-018
Figure 23. Conducted Emissions
ADM488/ADM489
Rev. D | Page 11 of 16
THEORY OF OPERATION
The ADM488/ADM489 are ruggedized RS-485 transceivers
that operate from a single 5 V supply. They contain protection
against radiated and conducted interference and are ideally
suited for operation in electrically harsh environments or where
cables can be plugged/unplugged. They are also immune to
high RF field strengths without special shielding precautions.
They are intended for balanced data transmission and comply
with both EIA RS-485 and RS-422 standards. They contain a
differential line driver and a differential line receiver, and are
suitable for full-duplex data transmission.
The input impedance on the ADM488/ADM489 is 12 kΩ,
allowing up to 32 transceivers on the differential bus. The
ADM488/ADM489 operate from a single 5 V ± 10% power
supply. A thermal shutdown circuit prevents excessive power
dissipation caused by bus contention or by output shorting.
This feature forces the driver output into a high impedance state
if, during fault conditions, a significant temperature increase is
detected in the internal driver circuitry.
The receiver contains a fail-safe feature that results in a logic
high output state if the inputs are unconnected (floating). A
high level of robustness is achieved using internal protection
circuitry, eliminating the need for external protection com-
ponents such as tranzorbs or surge suppressors. Furthermore,
low electromagnetic emissions are achieved using slew limited
drivers, minimizing interference both conducted and radiated.
The ADM488/ADM489 can transmit at data rates up to
250 kbps. A typical application for the ADM488/ADM489 is
illustrated in Figure 24 showing a full-duplex link where data is
transferred at rates of up to 250 kbps. A terminating resistor is
shown at both ends of the link. This termination is not critical
because the slew rate is controlled by the ADM488/ADM489
and reflections are minimized.
ADM488
D
RO
DI
A
B
Z
Y
DE
5
V
0.1µF
RS-485/RS-422 LINK
R
R
ADM489
5
V
0.1µF
D
RO
DI
DE
GNDGND
V
CC
V
CC
A
B
Z
Y
RE
RE
00079-024
Figure 24. ADM488/ADM489 Full-Duplex Data Link
The communications network can be extended to include
multipoint connections, as shown in Figure 30. As many as
32 transceivers can be connected to the bus.
Table 6 and Table 7 show the truth tables for transmitting and
receiving.
Table 6. Transmitting Truth Table
Inputs Outputs
RE DE DI Z Y
X1 1 1 0 1
X1 1 0 1 0
0 0 X1 Hi-Z Hi-Z
1 0 X1 Hi-Z Hi-Z
1 X = Don’t care.
Table 7. Receiving Truth Table
Inputs Output
RE DE A to B RO
0 0 ≥ +0.2 V 1
0 0 ≤ −0.2 V 0
0 0 Inputs O/C 1
1 0 X1 Hi-Z
1 X = Don’t care.
EFT TRANSIENT PROTECTION SCHEME
The ADM488/ADM489 use protective clamping structures on
their inputs and outputs that clamp the voltage to a safe level
and dissipate the energy present in ESD (electrostatic) and EFT
(electrical fast transients) discharges.
FAST TRANSIENT BURST IMMUNITY (IEC1000-4-4)
IEC1000-4-4 (previously 801-4) covers electrical fast transient
burst (EFT) immunity. Electrical fast transients occur as a result
of arcing contacts in switches and relays. The tests simulate the
interference generated when, for example, a power relay disconnects
an inductive load. A spark is generated due to the well known
back EMF effect. In fact, the spark consists of a burst of sparks
as the relay contacts separate. The voltage appearing on the line,
therefore, consists of a burst of extremely fast transient impulses.
A similar effect occurs when switching on fluorescent lights.
The fast transient burst test, defined in IEC1000-4-4, simulates
this arcing, and its waveform is illustrated in Figure 25. It
consists of a burst of 2.5 kHz to 5 kHz transients repeating at
300 ms intervals. It is specified for both power and data lines.
Four severity levels are defined in terms of an open-circuit voltage
as a function of installation environment. The installation
environments are defined as
• Well protec te d
• Protected
• Typical industrial
• Severe industrial
\ P" , _ xxxxxxxxx
ADM488/ADM489
Rev. D | Page 12 of 16
300ms
16ms
V
t
V
0.2/0.4ms
t
5ns
50ns
00079-025
Figure 25. IEC1000-4-4 Fast Transient Waveform
Table 8 shows the peak voltages for each of the environments.
Table 8. Peak Voltages
Level VPEAK (kV) PSU VPEAK (kV) I/O
1 0.5 0.25
2 1 0.5
3 2 1
4 4 2
A simplified circuit diagram of the actual EFT generator is
shown in Figure 26.
These transients are coupled onto the signal lines using an EFT
coupling clamp. The clamp is 1 m long and completely sur-
rounds the cable, providing maximum coupling capacitance
(50 pF to 200 pF typical) between the clamp and the cable. High
energy transients are capacitively coupled onto the signal lines.
Fast rise times (5 ns), as specified by the standard, result in very
effective coupling. This test is very severe because high voltages
are coupled onto the signal lines. The repetitive transients often
cause problems, while single pulses do not. Destructive latch-up
can be induced due to the high energy content of the transients.
Note that this stress is applied while the interface products are
powered up and transmitting data. The EFT test applies hun-
dreds of pulses with higher energy than ESD. Worst-case
transient current on an I/O line can be as high as 40 A.
R
C
C
C
Z
S
LR
M
C
D
HIGH
VOLTAGE
SOURCE
50Ω
OUTPUT
00079-026
Figure 26. EFT Generator
Test results are classified according to the following:
• Normal performance within specification limits.
• Temporary degradation or loss of performance that is self-
recoverable.
• Temporary degradation or loss of function or performance
that requires operator intervention or system reset.
• Degradation or loss of function that is not recoverable due
to damage.
The ADM488/ADM489 have been tested under worst-case
conditions using unshielded cables, and meet Classification 2 at
Severity Level 4. Data transmission during the transient
condition is corrupted, but it can be resumed immediately
following the EFT event without user intervention.
RADIATED IMMUNITY (IEC1000-4-3)
IEC1000-4-3 (previously IEC801-3) describes the measurement
method and defines the levels of immunity to radiated electro-
magnetic fields. It was originally intended to simulate the
electromagnetic fields generated by portable radio transceivers
or any other device that generates continuous wave-radiated
electromagnetic energy. Its scope has been broadened to include
spurious EM energy, which can be radiated from fluorescent
lights, thyristor drives, inductive loads, and so on.
Testing for immunity involves irradiating the device with an
EM field. Test methods include the use of anechoic chamber,
stripline cell, TEM cell, and GTEM cell. These consist of two
parallel plates with an electric field developed between them.
The device under test is placed between the plates and exposed
to the electric field. The three severity levels have field strengths
ranging from 1 V/m to 10 V/m. Results are classified as follows:
• Normal operation.
• Temporary degradation or loss of function that is self-
recoverable when the interfering signal is removed.
• Temporary degradation or loss of function that requires
operator intervention or system reset when the interfering
signal is removed.
• Degradation or loss of function that is not recoverable due
to damage.
ADM488/ADM489
Rev. D | Page 13 of 16
The ADM488/ADM489 comfortably meet Classification 1 at
the most stringent (Level 3) requirement. In fact, field strengths
up to 30 V/m showed no performance degradation, and error-
free data transmission continued even during irradiation.
Table 9. Field Strengths
Level V/m Field Strength
1 1
2 3
3 10
EMI EMISSIONS
The ADM488/ADM489 contain internal slew rate limiting to
minimize the level of electromagnetic interference generated.
Figure 27 shows an FFT plot when transmitting a 150 kHz data
stream.
10
0%
100
90
10dB/DIV
500kHz/DIV05
MHz
00079-027
Figure 27. Driver Output Waveform and FFT Plot Transmitting at 150 kHz
The slew limiting attenuates the high frequency components.
EMI is, therefore, reduced, as are reflections due to improperly
terminated cables.
EN55022, CISPR22 defines the permitted limits of radiated and
conducted interference from information technology
equipment (ITE).
The objective is to control the level of both conducted and
radiated emissions.
For ease of measurement and analysis, conducted emissions are
assumed to predominate below 30 MHz, while radiated
emissions predominate above this frequency.
CONDUCTED EMISSIONS
Conducted emissions are a measure of noise that is conducted
onto the main power supply. The noise is measured using a
LISN (line impedance stabilizing network) and a spectrum
analyzer. The test setup is shown in Figure 28. The spectrum
analyzer is set to scan the spectrum from 0 MHz to 30 MHz.
Figure 29 shows that the level of conducted emissions from the
ADM488/ADM489 is well below the maximum allowable
limits.
DUT LISN PSU
SPECTRUM
ANALYZER
00079-028
Figure 28. Conducted Emissions Test Setup
log FREQUENCY (0.15–30) (MHz)
0.3 0.6 136 10 30
80
0
70
40
30
20
10
60
50
LIMIT
dB (µV)
00079-029
Figure 29. Conducted Emissions
A; W
ADM488/ADM489
Rev. D | Page 14 of 16
APPLICATION INFORMATION
DIFFERENTIAL DATA TRANSMISSION
Differential data transmission is used to reliably transmit data at
high rates over long distances and through noisy environments.
Differential transmission nullifies the effects of ground shifts
and noise signals, which appear as common-mode voltages on
the line. Two main standards that specify the electrical
characteristics of transceivers used in differential data
transmission are approved by the EIA.
The RS-422 standard specifies data rates up to 10 MBaud and
line lengths up to 4000 ft. A single driver can drive a transmis-
sion line with up to 10 receivers.
To cater to true multipoint communications, the RS-485 stan-
dard was defined to meet or exceed the requirements of RS-422.
It also allows up to 32 drivers and 32 receivers to be connected
to a single bus. An extended common-mode range of −7 V to
+12 V is defined. The most significant difference between the
RS-422 and RS-485 is that the RS-485 drivers can be disabled,
thereby allowing up to 32 receivers to be connected to a single
line. Only one driver should be enabled at a time, but the RS-
485 standard contains additional specifications to guarantee
device safety in the event of line contention.
CABLE AND DATA RATE
The transmission line of choice for RS-485 communications is a
twisted pair. Twisted-pair cable tends to cancel common-mode
noise and also causes cancellation of the magnetic fields gener-
ated by the current flowing through each wire, thereby reducing
the effective inductance of the pair.
The ADM488/ADM489 are designed for bidirectional data
communications on multipoint transmission lines. A typical
application showing a multipoint transmission network is
illustrated in Figure 30. An RS-485 transmission line can have
up to 32 transceivers on the bus. Only one driver can transmit
at a particular time, but multiple receivers can be simultane-
ously enabled.
As with any transmission line, it is important that reflections be
minimized. This can be achieved by terminating the extreme
ends of the line using resistors equal to the characteristic im-
pedance of the line. Stub lengths of the main line should also be
kept as short as possible. A properly terminated transmission
line appears purely resistive to the driver.
Table 10. Comparison of RS-422 and RS-485 Interface Standards
Specification RS-422 RS-485
Transmission Type Differential Differential
Maximum Data Rate 10 MB/s 10 MB/s
Maximum Cable Length 4000 ft. 4000 ft.
Minimum Driver Output Voltage ±2 V ±1.5 V
Driver Load Impedance 100 Ω 54 Ω
Receiver Input Resistance 4 kΩ minimum 12 kΩ minimum
Receiver Input Sensitivity ±200 mV ±200 mV
Receiver Input Voltage Range −7 V to +7 V −7 V to +12 V
Number of Drivers/Receivers per Line 1/10 32/32
D
R
D
R
D
R
RT RT
D
R
00079-030
Figure 30. Typical RS-485 Network
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ADM488/ADM489
Rev. D | Page 15 of 16
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-001-BA
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
SEATING
PLANE
0.015
(0.38)
MIN
0.210
(5.33)
MAX
PIN 1
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
8
14
5
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 31. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099) × 45°
8°
0°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
41
85
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2440)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
Figure 32. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions show in millimeters and (inches)
COMPLIANT TO JEDEC STANDARDS MS-001-AA
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.150 (3.81)
0.130 (3.30)
0.110 (2.79)
0.070 (1.78)
0.050 (1.27)
0.045 (1.14)
14
17
8
0.100 (2.54)
BSC
0.775 (19.69)
0.750 (19.05)
0.735 (18.67)
PIN 1
0.060 (1.52)
MAX
0.430 (10.92)
MAX
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.015 (0.38)
GAUGE
PLANE
0.210
(5.33)
MAX
SEATING
PLANE
0.015
(0.38)
MIN
0.005 (0.13)
MIN
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
Figure 33. 14-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-14)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AB
COPLANARITY
0.10
14 8
7
1
6.20 (0.2441)
5.80 (0.2283)
4.00 (0.1575)
3.80 (0.1496)
8.75 (0.3445)
8.55 (0.3366)
1.27 (0.0500)
BSC
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0039)
0.51 (0.0201)
0.31 (0.0122)
1.75 (0.0689)
1.35 (0.0531)
8°
0°
0.50 (0.0197)
0.25 (0.0098)
1.27 (0.0500)
0.40 (0.0157)
0.25 (0.0098)
0.17 (0.0067)
× 45°
Figure 34. 14-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-14)
Dimensions shown in millimeters and (inches)
SE‘l/‘IléoECS; www.ana|ng.nnm
ADM488/ADM489
Rev. D | Page 16 of 16
16 9
81
PIN 1
SEATING
PLANE
8°
0°
4.50
4.40
4.30
6.40
BSC
5.10
5.00
4.90
0.65
BSC
0.15
0.05
1.20
MAX
0.20
0.09 0.75
0.60
0.45
0.30
0.19
COPLANARITY
0.10
COMPLIANT TO JEDEC STANDARDS MO-153-AB
Figure 35. 16-Lead Thin Shrink Small Outline Package [TSSOP]
(RU-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model Temperature Range Package Description Package Option
ADM488AN −40°C to +85°C 8-Lead Plastic Dual In-Line Package [PDIP] N-8
ADM488ANZ1−40°C to +85°C 8-Lead Plastic Dual In-Line Package [PDIP] N-8
ADM488AR −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM488AR-REEL −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM488AR-REEL7 −40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM488ARZ1−40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM488ARZ-REEL1−40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM488ARZ-REEL71−40°C to +85°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
ADM489AN −40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
ADM489ANZ1−40°C to +85°C 14-Lead Plastic Dual In-Line Package [PDIP] N-14
ADM489AR −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489AR-REEL −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489AR-REEL7 −40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489ARZ1−40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489ARZ-REEL1−40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489ARZ-REEL71−40°C to +85°C 14-Lead Standard Small Outline Package [SOIC_N] R-14
ADM489ARU −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARU-REEL −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARU-REEL7 −40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ1−40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ-REEL1−40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
ADM489ARUZ-REEL71−40°C to +85°C 16-Lead Thin Shrink Small Outline Package [TSSOP] RU-16
1 Z = Pb-free part.
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registered trademarks are the property of their respective owners.
C00079-0-4/06(D)