Texas Instruments' LMK61E2 is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.
The device features self-startup from on-chip EEPROM that is factory programmed to generate 156.25 MHz LVPECL output. The device registers and EEPROM settings are fully programmable in-system via I2C serial interface. Internal power conditioning provide excellent power supply ripple rejection (PSRR), reducing the cost and complexity of the power delivery network. The device operates from a single 3.3 V ±5% supply. The device provides fine and coarse frequency margining options via I2C serial interface to support system design verification tests (DVT), such as standard compliance and system timing margin testing.
| Features |
|
|
- Ultra-low noise, high performance
- Jitter: 90 fs RMS typical fOUT > 100 MHz
- PSRR: -70 dBc, robust supply noise immunity
- Flexible output format; user selectable
- LVPECL up to 1 GHz
- LVDS up to 900 MHz
- HCSL up to 400 MHz
- Total frequency tolerance of ±50 ppm
|
|
- System level features
- Frequency margining: fine and coarse
- Internal EEPROM: user configurable default settings
- Other features
- Device control: I2C
- 3.3 V operating voltage
- Industrial temperature range (-40°C to 85°C)
- 7 mm × 5 mm 6- or 8-pin package
|
| Applications |
|
|
- High-performance replacement for crystal-, SAW-, or silicon-based oscillators
- Switches, routers, network line cards, base band units (BBU), servers, storage/SAN
|
|
- Test and measurement
- Medical imaging
- FPGA, processor attach
|
Settings
Fast Delivery
Free Shipping
Incoterms
Payment Types
Marketplace Product
Texas Instruments' LMK61E2 is an ultra-low jitter PLLatinum™ programmable oscillator with a fractional-N frequency synthesizer with integrated VCO that generates commonly used reference clocks. The outputs can be configured as LVPECL, LVDS, or HCSL.
