When a logic device switches from a logic one to a logic zero, or a logic zero to a logic one, the output structure momentarily presents a low-impedance across the power supply. Each transition requires that a signal line be charged or discharged, which requires energy. The function of the bypass capacitor is to provide local storage to supply this energy. Local energy storage must be available over a broad frequency range. Very small capacitors with low series inductance are used to provide fast current for the high-frequency transitions. Larger, slower capacitors continue to supply current after the high-frequency capacitors energy is expended. FPGA technology requires capacitance in three frequency ranges, referred to as high, medium, and low. These frequencies span from the 1kHz range to the 500MHz range. Proper placement is very important for high-frequency capacitors (1 nanofarad to 100nF low inductance ceramic chip). It is less important for middle-frequency capacitors (10μF to 100μF tantalum or ceramic), and even less important for low-frequency capacitors (greater than 470μF). The reason for this dependence on placement is simple: Inductance in the path from capacitor terminals to the FPGA power pins must be kept as low as possible. This means keeping the path as short as possible, even when the path is through a solid ground or power plane. All distances are significant since the inductance of one inch of solid copper plane is about 1nH. Bypass capacitor vias must travel straight down to the ground or VCC plane. High-frequency bypass capacitors, whether on VCCINT or VCCIO, should be mounted within one centimeter of the associated VCC pin and middle-frequency bypass capacitors should be mounted within three centimeters of the VCC pins. Low-frequency bypass capacitors may be mounted anywhere on the board, within reason. Of course, the closer they are to the FPGA(s), the better.