How to Debounce a Button Input Using Programmable Logic

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Programmable logic offers a level of flexibility that is unavailable with traditional discrete logic ICs. Readily available development tools make it easy to take advantage of creating application-specific functions with field programmable gate arrays and complex programmable logic devices.  An example of such a function is that of debouncing a push-button switch input.

Figure 1 below illustrates an effective debouncing logic circuit.  The circuit continuously clocks the button’s logic level into FF1 and subsequently into FF2, resulting in FF1 and FF2 always storing the last two logic levels of the button.  When these two values remain identical for a specified time, then FF3 is enabled, and the stable value is clocked through to the result output.

Diagram of debouncing logic circuit

Figure 1: Debouncing logic circuit.

The XOR gate and N-bit counter accomplish the timing.  If the button’s level changes, the values of FF1 and FF2 differ for a clock cycle, clearing the N-bit counter via the XOR gate.  If the button’s level is unchanging (i.e. if FF1 and FF2 are the same logic level), then the XOR gate releases the counter’s synchronous clear, and the counter begins to count.  The counter continues to increment in this manner until it (1) reaches the specified time and enables the output register, or (2) is interrupted and cleared by the XOR gate because the button’s logic level is not yet stable.

The counter’s size determines the time required to validate the button’s stability.  When the counter increments to the point that its carry out bit is asserted, it disables itself from incrementing further and enables the output register FF3.  The circuit remains in this state until a different button value is clocked into FF1, clearing the counter via the XOR gate. 

 
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