Datenblatt für MUN5335DW1, NSBC123JPDxx von onsemi

Datenblatt - Kommentare/Fehler melden

MUN5335DW1 , NSBC1 23JPDXV NSBC1 23JPDP6 0N Semiconductor® This series of digilnl Iran: Iurs is designed ui replace a single device and iIs cxlcmal re ‘ior bias network. The Bias Resl Ier E Tm 'islur (BRT) cumai nglc Ira ‘ (or with a monolithic bias nciwurk consisting of we resisiors, a series base resisIur and a bascreminer resistor. Thc BRT eliminaie these individual cumponcnis by inregrnling them in“) n ingle deviee. The use eia BRT can reduce beih . yslcm eosi and board space. Features - Simplifies Cireuil Design - Reduces Board Space I Reduces Cemponem Ceum - s and NSV Prefix for Auiumoiivc and Other Applieariuns Requiring Unique SiIe anal Cunrml Change Requirements: AECrQlUl Qualified and PPAP Capable' H n n I These Devices are PbrFrce, Halogen Free/BFR Free and are RnI-Is Cnrnplianl I D MAXIMUM RATINGS U U U ('rA : 2st bolh polariiies or (PNP) a :32 (NPN), unless oihervvlse noted) Railng Symbol Max Unli ” m ” CollecIoIrBase Veliage V050 so Vde Q o CollecIoIrEmlﬂer Vellage vow 50 Vde u U L. edllecldr Cullen! — Conllnuous lc loo mAdc Inpur Forward vdlrage Vleywm 12 Vde n Inpui Reverse Valiage vimmv, 5 Vde Q SIresses exceeding Ihose Iisied In Ihe Maximum Raungs Iable may damage Ihe ’ ° __. device. II any dI Ihese limus ave exceeded. deviee Iuneudnaluy should nol be assumed. damage may occul and reliability may be affected, ORDERING INFORMATION nevlee Package Shlpplng' MUNsaasuwm e. SOT-(163 moo/Tape & Reel SMUNSSESDWITWG" MUNsaasuwrrze. SOT-(163 moo/Tape & Reel SMUNsaaanl T26“ NSBCIZSJPDXVSTI e. SOT-563 4,000/Tape & Reel NSVECI zaJPvae'n G" NSBCIZSJPDXVSTSG SOT-563 8,000/Tape & Reel NSBCIZSJPDPGTSG SOT-963 8,000/Tape & Reel 1For Inlolmailon on Iape and reel specmcaiions, Includlng pan orlemaiiorl and Iape sizes. please reIei to our Tape and Reel Packaging Specmcatiorls Brochure, BRDsml/D, e semananeiaresmaanenunausnee LLC zuls 1 Publicalion OIdeI Numhev. June, 2017 - Rev. 4 DTC123JP/D

June, 2017 − Rev. 4

1Publication Order Number:

DTC123JP/D

MUN5335DW1,

NSBC123JPDXV6,

NSBC123JPDP6

Complementary Bias

Resistor Transistors

R1 = 2.2 kW, R2 = 47 kW

NPN and PNP Transistors with Monolithic

Bias Resistor Network

This series of digital transistors is designed to replace a single

device and its external resistor bias network. The Bias Resistor

Transistor (BRT) contains a single transistor with a monolithic bias

network consisting of two resistors; a series base resistor and a

base-emitter resistor. The BRT eliminates these individual

components by integrating them into a single device. The use of a BRT

can reduce both system cost and board space.

Features

•Simplifies Circuit Design

•Reduces Board Space

•Reduces Component Count

•S and NSV Prefix for Automotive and Other Applications

Requiring Unique Site and Control Change Requirements;

AEC-Q101 Qualified and PPAP Capable*

•These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS

Compliant

MAXIMUM RATINGS

(TA = 25°C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted)

Rating Symbol Max Unit

Collector-Base Voltage VCBO 50 Vdc

Collector-Emitter Voltage VCEO 50 Vdc

Collector Current − Continuous IC100 mAdc

Input Forward Voltage VIN(fwd) 12 Vdc

Input Reverse Voltage VIN(rev) 5 Vdc

Stresses exceeding those listed in the Maximum Ratings table may damage the

device. If any of these limits are exceeded, device functionality should not be

assumed, damage may occur and reliability may be affected.

ORDERING INFORMATION

Device Package Shipping†

MUN5335DW1T1G,

SMUN5335DW1T1G*

SOT−363 3,000/Tape & Reel

MUN5335DW1T2G,

SMUN5335DW1T2G*

SOT−363 3,000/Tape & Reel

NSBC123JPDXV6T1G,

NSVBC123JPDXV6T1G*

SOT−563 4,000/Tape & Reel

NSBC123JPDXV6T5G SOT−563 8,000/Tape & Reel

NSBC123JPDP6T5G SOT−963 8,000/Tape & Reel

†For information on tape and reel specifications, including part orientation and

tape sizes, please refer to our Tape and Reel Packaging Specifications

Brochure, BRD8011/D.

www.onsemi.com

MARKING DIAGRAMS

PIN CONNECTIONS

35 M G

35/D = Specific Device Code

M = Date Code*

G= Pb-Free Package

(Note: Microdot may be in either location)

*Date Code orientation may vary depending up-

on manufacturing location.

SOT−363

CASE 419B

SOT−563

CASE 463A

(1)(2)(3)

(6)(5)(4)

SOT−963

CASE 527AD

35 MG

www onsem' com

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

THERMAL CHARACTERISTICS

Characteristic Symbol Max Unit

MUN5335DW1 (SOT−363) ONE JUNCTION HEATED

Total Device Dissipation

TA = 25°C (Note 1)

(Note 2)

Derate above 25°C (Note 1)

(Note 2)

PD187

256

1.5

2.0

mW/°C

Thermal Resistance, (Note 1)

Junction to Ambient (Note 2)

RqJA 670

490

°C/W

MUN5335DW1 (SOT−363) BOTH JUNCTION HEATED (Note 3)

Total Device Dissipation

TA = 25°C (Note 1)

(Note 2)

Derate above 25°C (Note 1)

(Note 2)

PD250

385

2.0

3.0

mW/°C

Thermal Resistance,

Junction to Ambient (Note 1)

(Note 2)

RqJA 493

325

°C/W

Thermal Resistance,

Junction to Lead (Note 1)

(Note 2)

RqJL 188

208

°C/W

Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C

NSBC123JPDXV6 (SOT−563) ONE JUNCTION HEATED

Total Device Dissipation

TA = 25°C (Note 1)

Derate above 25°C (Note 1)

PD357

2.9

mW/°C

Thermal Resistance,

Junction to Ambient (Note 1)

RqJA 350

°C/W

NSBC123JPDXV6 (SOT−563) BOTH JUNCTION HEATED (Note 3)

Total Device Dissipation

TA = 25°C (Note 1)

Derate above 25°C (Note 1)

PD500

4.0

mW/°C

Thermal Resistance,

Junction to Ambient (Note 1)

RqJA 250

°C/W

Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C

NSBC123JPDP6 (SOT−963) ONE JUNCTION HEATED

Total Device Dissipation

TA = 25°C (Note 4)

(Note 5)

Derate above 25°C (Note 4)

(Note 5)

PD231

269

1.9

2.2

mW/°C

Thermal Resistance,

Junction to Ambient (Note 4)

(Note 5)

RqJA 540

464

°C/W

NSBC123JPDP6 (SOT−963) BOTH JUNCTION HEATED (Note 3)

Total Device Dissipation

TA = 25°C (Note 4)

(Note 5)

Derate above 25°C (Note 4)

(Note 5)

PD339

408

2.7

3.3

mW/°C

Thermal Resistance,

Junction to Ambient (Note 4)

(Note 5)

RqJA 369

306

°C/W

Junction and Storage Temperature Range TJ, Tstg −55 to +150 °C

1. FR−4 @ Minimum Pad.

2. FR−4 @ 1.0 ×1.0 Inch Pad.

3. Both junction heated values assume total power is sum of two equally powered channels.

4. FR−4 @ 100 mm2, 1 oz. copper traces, still air.

5. FR−4 @ 500 mm2, 1 oz. copper traces, still air.

www onsem' com

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

ELECTRICAL CHARACTERISTICS (TA=25°C both polarities Q1 (PNP) & Q2 (NPN), unless otherwise noted)

Characteristic Symbol Min Typ Max Unit

OFF CHARACTERISTICS

Collector-Base Cutoff Current

(VCB =50V, I

E=0)

ICBO

− − 100

nAdc

Collector-Emitter Cutoff Current

(VCE =50V, I

B=0)

ICEO

− − 500

nAdc

Emitter-Base Cutoff Current

(VEB = 6.0 V, IC=0)

IEBO

− − 0.2

mAdc

Collector-Base Breakdown Voltage

(IC=10mA, IE=0)

V(BR)CBO 50 − −

Vdc

Collector-Emitter Breakdown Voltage (Note 6)

(IC= 2.0 mA, IB=0)

V(BR)CEO 50 − −

Vdc

ON CHARACTERISTICS

DC Current Gain (Note 6)

(IC= 5.0 mA, VCE =10V)

hFE 80 140 −

Collector-Emitter Saturation Voltage (Note 6)

(IC= 10 mA, IB= 0.3 mA)

VCE(sat)

− − 0.25

Input Voltage (Off)

(VCE = 5.0 V, IC= 100 mA) (NPN)

(VCE = 5.0 V, IC= 100 mA) (PNP)

Vi(off)

−

0.6

−

Vdc

Input Voltage (On)

(VCE = 0.2 V, IC= 5.0 mA) (NPN)

(VCE = 0.2 V, IC= 5.0 mA) (PNP)

Vi(on)

−

0.8

−

Vdc

Output Voltage (On)

(VCC = 5.0 V, VB= 2.5 V, RL= 1.0 kW)

VOL

− − 0.2

Vdc

Output Voltage (Off)

(VCC = 5.0 V, VB= 0.5 V, RL= 1.0 kW)

VOH 4.9 − −

Vdc

Input Resistor R1 1.5 2.2 2.9 kW

Resistor Ratio R1/R20.038 0.047 0.056

6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle ≤2%.

Figure 1. Derating Curve

AMBIENT TEMPERATURE (°C)

1251007550250−25−50

100

150

200

250

300

PD, POWER DISSIPATION (mW)

150

(1) (2)

(1) SOT−363; 1.0 ×1.0 Inch Pad

(2) SOT−563; Minimum Pad

(3) SOT−963; 100 mm2, 1 oz. Copper Trace

350

400

(3)

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

TYPICAL CHARACTERISTICS − NPN TRANSISTOR

MUN5335DW1, NSBC123JPDXV6

f = 10 kHz

IE = 0 A

TA = 25°C

3.6

3.2

2.8

2.4

1.6

1.2

0.8

0.4

010 20304050

75°C

25°C

−25°C

Figure 2. VCE(sat) vs. ICFigure 3. DC Current Gain

Figure 4. Output Capacitance Figure 5. Output Current vs. Input Voltage

Vin, INPUT VOLTAGE (V)VR, REVERSE BIAS VOLTAGE (VOLTS)

Figure 6. Input Voltage vs. Output Current

IC, COLLECTOR CURRENT (mA)

0.1

504020100

IC, COLLECTOR CURRENT (mA)

100101

1000

0.001

VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)

hFE, DC CURRENT GAIN

Cob, CAPACITANCE (pF)

100

6543210

0.001

IC, COLLECTOR CURRENT (mA)

10987

3020100

0.1

40 50

Vin, INPUT VOLTAGE (V)

75°C

25°C

TA = −25°C

75°C

25°C

TA = −25°C

75°C

25°CTA = −25°C

0.01

0.1

100

VO = 5 V

VO = 0.2 V

IC/IB = 10 VCE = 10 V

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

TYPICAL CHARACTERISTICS − PNP TRANSISTOR

MUN5335DW1, NSBC123JPDXV6

f = 10 kHz

IE = 0 A

TA = 25°C

010 20304050

150°C

25°C

−55°C

Figure 7. VCE(sat) vs. ICFigure 8. DC Current Gain

Figure 9. Output Capacitance Figure 10. Output Current vs. Input Voltage

Vin, INPUT VOLTAGE (V)VR, REVERSE BIAS VOLTAGE (V)

Figure 11. Input Voltage vs. Output Current

IC, COLLECTOR CURRENT (mA)

0.1

504020100

IC, COLLECTOR CURRENT (mA)

1000101

1000

0.01

VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)

hFE, DC CURRENT GAIN

Cob, CAPACITANCE (pF)

100

43210

0.001

IC, COLLECTOR CURRENT (mA)

3020100

0.1

40 50

Vin, INPUT VOLTAGE (V)

0.01

0.1

100

VO = 5 V

VO = 0.2 V

IC/IB = 10 VCE = 10 V

25°C

150°C−55°C

25°C

−55°C

150°C

25°C

−55°C

150°C

100

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

TYPICAL CHARACTERISTICS − NPN TRANSISTOR

NSBC123JPDP6

150°C

25°C

−55°C

Figure 12. VCE(sat) vs. ICFigure 13. DC Current Gain

Figure 14. Output Capacitance Figure 15. Output Current vs. Input Voltage

Vin, INPUT VOLTAGE (V)VR, REVERSE BIAS VOLTAGE (V)

Figure 16. Input Voltage vs. Output Current

IC, COLLECTOR CURRENT (mA)

0.1

504020100

IC, COLLECTOR CURRENT (mA)

1000101

1000

VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)

hFE, DC CURRENT GAIN

50403020100

Cob, CAPACITANCE (pF)

100

0.001

IC, COLLECTOR CURRENT (mA)

3020100

0.1

40 50

Vin, INPUT VOLTAGE (V)

0.01

0.1

100

f = 10 kHz

IE = 0 A

TA = 25°C

VO = 5 V

VO = 0.2 V

IC/IB = 10 VCE = 10 V

−55°C

25°C150°C

2.4

1.6

1.2

0.8

0.4

25°C

−55°C

150°C

0 0.5 1 1.5 2 2.5 3

100

25°C

150°C

−55°C

100

MUN5335DW1, NSBC123JPDXV6, NSBC123JPDP6

www.onsemi.com

TYPICAL CHARACTERISTICS − PNP TRANSISTOR

NSBC123JPDP6

150°C

25°C

−55°C

Figure 17. VCE(sat) vs. ICFigure 18. DC Current Gain

Figure 19. Output Capacitance Figure 20. Output Current vs. Input Voltage

Vin, INPUT VOLTAGE (V)VR, REVERSE BIAS VOLTAGE (V)

Figure 21. Input Voltage vs. Output Current

IC, COLLECTOR CURRENT (mA)

0.1

504020100

IC, COLLECTOR CURRENT (mA)

100101

1000

VCE(sat), COLLECTOR−EMITTER VOLTAGE (V)

hFE, DC CURRENT GAIN

50403020100

Cob, CAPACITANCE (pF)

100

0.001

IC, COLLECTOR CURRENT (mA)

3020100

0.1

40 50

Vin, INPUT VOLTAGE (V)

0.01

0.1

100

f = 10 kHz

IE = 0 A

TA = 25°C

VO = 5 V

VO = 0.2 V

IC/IB = 10 VCE = 10 V

−55°C

25°C150°C

25°C

−55°C

150°C

01 2 3

100

25°C

150°C

−55°C

0.1

0N Semiwndudw" sofas/scvoas/sonzs: CASE 4193702 ‘ ISSUE v SCALE 2:1 DATE 11 DEC 2012 NOTES T DTMENsTDmNG AND ToLEHANcws PER AsME v14 SM 199» 2 coNTRoLLwe DTMENSTDN MILUMEIERS EH ’9 3 DIMENSIONS D AND E Do NOT wows mom FLASH i womusms. 0R GATE aunns mom FLASH. pnomua SIGNS 0R GATE EURRS SHALL NOT EXCEED a 2n PER END 4 DTMENsTDNs D AND E AT THE OuTERMOSI EXTREMES OF THE PLASHC aouv AND DATuM H 5 DATUMS A AND a ARE DETERMTNED AT DATUM H 5 DTMENsTDNs 5 AND c APPLV To THE FLAT SECTION 0: THE DE LEAD BETWEEN a ca AND a 15 FROM THE w 7 DTMENsTDN a DoEs Not TNcLuDE DAMBAR PHoTRusToN ALLOWAELE DAMBAR PRoTHusToN sHALL HE u as TOTAL w E, 2x _EH D ““"s IJQL _Iﬂ®ﬂ3li TOP VIEW m5 Dec 025 nuns mm mm] nus m5 D22 nun: DUDE Duos DEW” Hit) em: 22a um um um EETZF J \ SIDE VIEW RECOMMENDED H H H SOLDERING FOOTPRINT“ o.30~>He Bias I] Q] DL’ 3 U U ,,+ T 2.50 mmﬂi, 06544 Le PITCH DTMENsToNs MILUMEIERS “Fol admhona‘ Informahon on our Ply-Flee strategy and soldenng aeLaus, please aowmoaa me ON Semwconducmr Soldering and Moummg Techniques Relevance ManuaL SOLDERRM/D STYLES ON PAGE 2 Elenmmc vevsmns are unmnlm DOCU M ENT NUMBER: QBASBAZQBSB mm vasmns are unmnlmﬂe DESCRIPTION: SCrBB/SC7075/SOTE363 ON Samanaucmy and are hademavks av Samanaucmr Campananus lnduslnes. LLC dba ON Samanaucxar ar us suasTmanas Tn xna Umled sxaxss andJm nIhev cmmInes ON Sammnaucxar vesewes me My?“ to make changes wunum Yunnan Home to any pruduns hecem ON Semmnauaw makes m7 walvamy. represenlalmn m guarantee regardmg Lna Mammy av TL: manual: Iur any pamauTay purpase nnv dues ON Semumnduclm assume any Mammy snsmg nulnI xna appncauan m use HI any pmdudm mum and Specmcsﬂy mscxanns any and an Mammy mcmdmg wunam hmma‘mn spsmaT cansequemm m Tnmdeﬂvla‘ damages ON Semmnaucxar dues nuI away any hcense under Ms paLanL ngnus Ivar xna ngms av n|hers

SC−88/SC70−6/SOT−363

CASE 419B−02

ISSUE Y

DATE 11 DEC 2012

SCALE 2:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS.

3. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD FLASH,

PROTRUSIONS, OR GATE BURRS. MOLD FLASH, PROTRU-

SIONS, OR GATE BURRS SHALL NOT EXCEED 0.20 PER END.

4. DIMENSIONS D AND E1 AT THE OUTERMOST EXTREMES OF

THE PLASTIC BODY AND DATUM H.

5. DATUMS A AND B ARE DETERMINED AT DATUM H.

6. DIMENSIONS b AND c APPLY TO THE FLAT SECTION OF THE

LEAD BETWEEN 0.08 AND 0.15 FROM THE TIP.

7. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION.

ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.08 TOTAL IN

EXCESS OF DIMENSION b AT MAXIMUM MATERIAL CONDI-

TION. THE DAMBAR CANNOT BE LOCATED ON THE LOWER

RADIUS OF THE FOOT.

Cddd M

123

654

XXXMG

XXX = Specific Device Code

M = Date Code*

G= Pb−Free Package

GENERIC

MARKING DIAGRAM*

STYLES ON PAGE 2

DIM MIN NOM MAX

MILLIMETERS

A−−− −−− 1.10

A1 0.00 −−− 0.10

ddd

b0.15 0.20 0.25

C0.08 0.15 0.22

D1.80 2.00 2.20

−−− −−− 0.043

0.000 −−− 0.004

0.006 0.008 0.010

0.003 0.006 0.009

0.070 0.078 0.086

MIN NOM MAX

INCHES

0.10 0.004

E1 1.15 1.25 1.35

e0.65 BSC

L0.26 0.36 0.46

2.00 2.10 2.20

0.045 0.049 0.053

0.026 BSC

0.010 0.014 0.018

0.078 0.082 0.086

(Note: Microdot may be in either location)

*Date Code orientation and/or position may

vary depending upon manufacturing location.

*For additional information on our Pb−Free strategy and soldering

details, please download the ON Semiconductor Soldering and

Mounting Techniques Reference Manual, SOLDERRM/D.

SOLDERING FOOTPRINT*

0.65

0.66

DIMENSIONS: MILLIMETERS

0.30

PITCH

2.50

RECOMMENDED

TOP VIEW

SIDE VIEW END VIEW

bbb H

SEATING

PLANE

DETAIL A E

A2 0.70 0.90 1.00 0.027 0.035 0.039

L2 0.15 BSC 0.006 BSC

aaa 0.15 0.006

bbb 0.30 0.012

ccc 0.10 0.004

A-B D

aaa C

2X 3 TIPS

aaa H D

PLANE

DETAIL A

GAGE

ccc C

*This information is generic. Please refer to

device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may

or may not be present. Some products may

not follow the Generic Marking.

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98ASB42985B

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 2

SC−88/SC70−6/SOT−363

ON Semxcunduclm and are hademavks av Semxcanduclur Campunenls lnduslnes. uc dha ON Samanaucxar ar us suhsxdxanes m xna Umled sxaxas andJm mhev cmm‘nes ON Semxcunduclar vesewes me “gm to make changes wuhum mnna. mouse to any pruduns necem ON Semanduc‘m makes nu wanamy. represenlalmn m guarantee regardmg ma sumahmly at W; manual: can any pamcu‘av purpase nnv dues ON Semumnduclm assume any Mammy snsmg mm xna aapncauan m use M any pmduclnv mum and specmcsl‘y dwsc‘axms any and an Mammy mc‘udmg wxlham hmma‘mn spema‘ cansequemm m \nmdeula‘ damages ON Semxmnduclar dues nn| away any hcense under Ms pa|EM nghls Ivar xna ngms av n|hers

STYLE 1:

PIN 1. EMITTER 2

2. BASE 2

3. COLLECTOR 1

4. EMITTER 1

5. BASE 1

6. COLLECTOR 2

STYLE 3:

CANCELLED

STYLE 2:

CANCELLED

STYLE 4:

PIN 1. CATHODE

2. CATHODE

3. COLLECTOR

4. EMITTER

5. BASE

6. ANODE

STYLE 5:

PIN 1. ANODE

2. ANODE

3. COLLECTOR

4. EMITTER

5. BASE

6. CATHODE

STYLE 6:

PIN 1. ANODE 2

2. N/C

3. CATHODE 1

4. ANODE 1

5. N/C

6. CATHODE 2

STYLE 7:

PIN 1. SOURCE 2

2. DRAIN 2

3. GATE 1

4. SOURCE 1

5. DRAIN 1

6. GATE 2

STYLE 8:

CANCELLED

STYLE 11:

PIN 1. CATHODE 2

2. CATHODE 2

3. ANODE 1

4. CATHODE 1

5. CATHODE 1

6. ANODE 2

STYLE 9:

PIN 1. EMITTER 2

2. EMITTER 1

3. COLLECTOR 1

4. BASE 1

5. BASE 2

6. COLLECTOR 2

STYLE 10:

PIN 1. SOURCE 2

2. SOURCE 1

3. GATE 1

4. DRAIN 1

5. DRAIN 2

6. GATE 2

STYLE 12:

PIN 1. ANODE 2

2. ANODE 2

3. CATHODE 1

4. ANODE 1

5. ANODE 1

6. CATHODE 2

STYLE 13:

PIN 1. ANODE

2. N/C

3. COLLECTOR

4. EMITTER

5. BASE

6. CATHODE

STYLE 14:

PIN 1. VREF

2. GND

3. GND

4. IOUT

5. VEN

6. VCC

STYLE 15:

PIN 1. ANODE 1

2. ANODE 2

3. ANODE 3

4. CATHODE 3

5. CATHODE 2

6. CATHODE 1

STYLE 17:

PIN 1. BASE 1

2. EMITTER 1

3. COLLECTOR 2

4. BASE 2

5. EMITTER 2

6. COLLECTOR 1

STYLE 16:

PIN 1. BASE 1

2. EMITTER 2

3. COLLECTOR 2

4. BASE 2

5. EMITTER 1

6. COLLECTOR 1

STYLE 18:

PIN 1. VIN1

2. VCC

3. VOUT2

4. VIN2

5. GND

6. VOUT1

STYLE 19:

PIN 1. I OUT

2. GND

3. GND

4. V CC

5. V EN

6. V REF

STYLE 20:

PIN 1. COLLECTOR

2. COLLECTOR

3. BASE

4. EMITTER

5. COLLECTOR

6. COLLECTOR

STYLE 22:

PIN 1. D1 (i)

2. GND

3. D2 (i)

4. D2 (c)

5. VBUS

6. D1 (c)

STYLE 21:

PIN 1. ANODE 1

2. N/C

3. ANODE 2

4. CATHODE 2

5. N/C

6. CATHODE 1

STYLE 23:

PIN 1. Vn

2. CH1

3. Vp

4. N/C

5. CH2

6. N/C

STYLE 24:

PIN 1. CATHODE

2. ANODE

3. CATHODE

4. CATHODE

5. CATHODE

6. CATHODE

STYLE 25:

PIN 1. BASE 1

2. CATHODE

3. COLLECTOR 2

4. BASE 2

5. EMITTER

6. COLLECTOR 1

STYLE 26:

PIN 1. SOURCE 1

2. GATE 1

3. DRAIN 2

4. SOURCE 2

5. GATE 2

6. DRAIN 1

STYLE 27:

PIN 1. BASE 2

2. BASE 1

3. COLLECTOR 1

4. EMITTER 1

5. EMITTER 2

6. COLLECTOR 2

STYLE 28:

PIN 1. DRAIN

2. DRAIN

3. GATE

4. SOURCE

5. DRAIN

6. DRAIN

STYLE 29:

PIN 1. ANODE

2. ANODE

3. COLLECTOR

4. EMITTER

5. BASE/ANODE

6. CATHODE

SC−88/SC70−6/SOT−363

CASE 419B−02

ISSUE Y

DATE 11 DEC 2012

STYLE 30:

PIN 1. SOURCE 1

2. DRAIN 2

3. DRAIN 2

4. SOURCE 2

5. GATE 1

6. DRAIN 1

Note: Please refer to datasheet for

style callout. If style type is not called

out in the datasheet refer to the device

datasheet pinout or pin assignment.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98ASB42985B

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 2 OF 2

SC−88/SC70−6/SOT−363

0N Semiwndudw" m NDTES: 1. DIMENSIDNING AND TEILERANCING PER ASME Y14.5M. 2009. 2. CDNTREILLING DIMENSIDN: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS DF EASE MATERIAL. kDAE A f—sx L PIN DNE 6 5 4 + INDICATEIR b 1 2 3 LJLJ e» EULEM b *H: TDP VIEW SIDE VIEW 1.30 6X 0.30 MILLIMETERS :[GX 045 DIM MIN. NDM. MAX. D E Di A 0.50 0.55 0.60 k1 0.17 0.22 0.27 c 0.08 0.13 0.18 1.80 D 1.50 1.60 1.70 E 1.10 1.20 1.30 D e 0.50 BSC L 0.10 0.20 0.30 0.50 PITCH H: 1.50 1.60 1.70 RECEIMMENDED MDUNTING FDDTPRINTIIE :- For mamanm lnfornnﬂan on our Phirrep s‘ro‘tegy and somermq demﬂs, please download the UN seniconuucmr Soldering and Mowmng Technlquas RBFBrsnca Mnnum, smugnkwn ON Semmunduclm and J are Mademavks a1 Semcanduclur Campunenls lnduslnes Lu: 0173 ON Semmanduclar Dr 115 aaaaaanaa 1n the unnaa Slates andJnv mhev commas ON Semmunduclar vesewes me th| In make changes wurmm mnna. nanaa In any prnduns nanan ON Semwnduc‘nv makes m7 wavvamy represenlalmn m guarantee regardmg the sumammy a1 1L; manuals 1m any pamcu‘av purpase nnv dues ON Semmnnduclm assume any Mammy ansmg 01AM me apphcahan m use a1 any pmdudnv c1rcu1| and saaanaauy mscIam‘s any and au Mammy mcmdmg w1|hw|hmma|mn spasm cansequenha‘ m madenla‘ damages ON Sermmnduclar dues nnl aanyay any hcense under 115 pa|em thls nar xna ngma av n|hers

SOT−563, 6 LEAD

CASE 463A

ISSUE H

DATE 26 JAN 2021

SCALE 4:1

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON11126D

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 2

SOT−563, 6 LEAD

LE 11 LE 21 LE 3. PIN l. EMITTER 1 PIN l. EMITTER 1 PIN l. CATHDDE l a. EASE 1 2. EMITTER 2 2. CATHDDE 1 3. CEILLECTEIR 2 3. EASE 2 3. ANDDE/ANEIDE E 4. EMITTER 2 4. EDLLECTDR 2 4. CATHDDE 2 5. EASE 2 5. BASE 1 5 CATHDDE 2 s. CEILLECTEIR 1 s. CEILLECTEIR 1 s. ANDDE/ANDDE 1 ,1 ,1 ,1 511112 41 STYLE 51 STYLE 51 ‘L U U FIN 1. CEILLECTDR FIN 1 CATHDDE PIN 1 CATHDDE 2. CEILLECTEIR 2. CATHDDE 2. ANDDE 3. EASE 3. ANDDE 3 CATHDDE 4. EMITTER 4. ANDDE 4. CATHDDE 5. CEILLECTEIR 5. CATHDDE 5. CATHDDE S. CEILLECTEIR S. CATHDDE S. CATHDDE $11112 7. STYLE 9. STYLE 9. PIN 1. CATHDDE FIN 1. 1mm FIN 1. SEIURCE 1 2. ANEIDE E. DRAIN E. GATE 1 3. CATHDDE :. GATE 3. DRAIN 2 4. CATHDDE 4. SEIURCE 4 SEIURCE 2 5. ANDDE 5. 1mm 5. GATE 2 s. CATHDDE 5. 1mm 5 DRAIN 1 STYLE 1m STYLE 11 PIN 1. CATHDDE 1 PIN 1. EMITTER 2 2. WC 2. EASE a 3. CATHDDE 2 3. CEILLECTEIR 1 4. ANDDE 2 4. EMITTER 1 5. N/C 5. EASE 1 s. ANDDE 1 e. CEILLECTEIR 2 ON Semcunduclm and J ana hademavks ac Semcanduclur Cnmpunenls lnduslnes. 11c aaa ON Semcanduclar an 115 suhs1d1ar1es1n 1na Umled Slates andJnl mhev commas ON Semcunduclar naaaayaa me mm In make changes wuhwl Yunnan nanaa In any panama nanan 0N Semwnduc‘m makes na walvamy. represenlalmn an guarantee nagamnna the aanaanny a! a; manuals a. any pamcu‘av aunaaaa nan dues ON Semmnnduclm aaaama any Mammy ansmg mun! 1na apphcshan m use a4 any pmdudnv c1rcu1| and aaaanaany manna any and an Mammy Mcmdmg mmam hmmahun aaaaa aanaaaaanna m .naaanua damages ON Sermmnduclar dues na1aanyay any hcense under .15 pa|eml1ghls nan 1na nama av n|hers

SOT−563, 6 LEAD

CASE 463A

ISSUE H

DATE 26 JAN 2021

XX = Specific Device Code

M = Month Code

G= Pb−Free Package

XX MG

GENERIC

MARKING DIAGRAM*

*This information is generic. Please refer to

device data sheet for actual part marking.

Pb−Free indicator, “G” or microdot “G”, may

or may not be present. Some products may

not follow the Generic Marking.

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON11126D

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 2 OF 2

SOT−563, 6 LEAD

0N Semiwndudw" 55:. 55:. 5] *M’L‘D [w L. 4357+ \ O 5. 5.5.5. 5.5.52 n.5.. 5.55.55. n5. 5.5515 2 5555. 2 5.5515 5 common2 5 54552 4 5.551552 4 come 5 55552 5 5455. 5 common. 5 coma 5.5.54 5.5.55 n.5.. common n5. cATHoD 2 common 2 cATHoD 5 5555 5 ANODE 4 5.55155 4 ANODE 5 common 5 cATHoD 5 common 5 cATHo 5.5.57 5.5.55 5.5. c.5555 5.5. 555.5 *1 r 2 55oo5 2 onnw 5 c555oo5 5 55.5 55 4 c555oo5 4 scum: 5 55oo5 5 onnw , 7+ 7 m 5 c555oo5 5 onnw smm W l n.5.. cmoog. 2 5c 5. .5 5 c555oo52 4 moon 5 5c 5 woos. on 5555555555. 555 J 5555.55.55 5. 5555555555. c55555555 5555.555. mc 555 05. 5555555555. 5. .5 555555555 .5 .55 55.55 5.5.55 555.5. 5.55. 5555555. on 5555555555. 555.555 .55 555. .5 .5555 5555555 55555. .5555. 55.55. .5 555 5.555555 55.55 o5 5555555555. 55555 55 55555.5. 5555555555 5. 5555555 555555 .55 5555555 5. .55 5.55555 .5. 55 55555.5. 55.5555 555. o5 55.555.555.55. 5555.55 555 5555.5 555.5 55.5. .55 555555555 5. 5. 555 5.5555. 5. 5555.. 555 55555555 555.555 555 555 5.. 5555.5 55.55.55 5.555. 5555555 55555. 5555555555. 5. 55555.5. 55.55555 05. 5555555555. 5555 55. 555555 555 55555 5555. 55 55.55. 555.5 .55 555.5 5. 5.55.5

SOT−963

CASE 527AD−01

ISSUE E

DATE 09 FEB 2010

SCALE 4:1

GENERIC

MARKING DIAGRAM*

X = Specific Device Code

M = Month Code

*This information is generic. Please refer

to device data sheet for actual part

marking.

Pb−Free indicator, “G” or microdot “ G”,

may or may not be present.

DIM MIN NOM MAX

MILLIMETERS

A0.34 0.37 0.40

b0.10 0.15 0.20

C0.07 0.12 0.17

D0.95 1.00 1.05

E0.75 0.80 0.85

e0.35 BSC

0.95 1.00 1.05

123

456

NOTES:

1. DIMENSIONING AND TOLERANCING PER ASME

Y14.5M, 1994.

2. CONTROLLING DIMENSION: MILLIMETERS

3. MAXIMUM LEAD THICKNESS INCLUDES LEAD

FINISH THICKNESS. MINIMUM LEAD

THICKNESS IS THE MINIMUM THICKNESS OF

BASE MATERIAL.

4. DIMENSIONS D AND E DO NOT INCLUDE MOLD

FLASH, PROTRUSIONS, OR GATE BURRS.

STYLE 1:

PIN 1. EMITTER 1

2. BASE 1

3. COLLECTOR 2

4. EMITTER 2

5. BASE 2

6. COLLECTOR 1

STYLE 2:

PIN 1. EMITTER 1

2. EMITTER2

3. BASE 2

4. COLLECTOR 2

5. BASE 1

6. COLLECTOR 1

STYLE 3:

PIN 1. CATHODE 1

2. CATHODE 1

3. ANODE/ANODE 2

4. CATHODE 2

5. CATHODE 2

6. ANODE/ANODE 1

STYLE 4:

PIN 1. COLLECTOR

2. COLLECTOR

3. BASE

4. EMITTER

5. COLLECTOR

6. COLLECTOR

STYLE 6:

PIN 1. CATHODE

2. ANODE

3. CATHODE

4. CATHODE

5. CATHODE

6. CATHODE

STYLE 5:

PIN 1. CATHODE

2. CATHODE

3. ANODE

4. ANODE

5. CATHODE

6. CATHODE

STYLE 7:

PIN 1. CATHODE

2. ANODE

3. CATHODE

4. CATHODE

5. ANODE

6. CATHODE

STYLE 8:

PIN 1. DRAIN

2. DRAIN

3. GATE

4. SOURCE

5. DRAIN

6. DRAIN

STYLE 9:

PIN 1. SOURCE 1

2. GATE 1

3. DRAIN 2

4. SOURCE 2

5. GATE 2

6. DRAIN 1

STYLE 10:

PIN 1. CATHODE 1

2. N/C

3. CATHODE 2

4. ANODE 2

5. N/C

6. ANODE 1

TOP VIEW

SIDE VIEW

X0.08

BOTTOM VIEW

0.35

PITCH

1.20

0.20

DIMENSIONS: MILLIMETERS

RECOMMENDED

PACKAGE

OUTLINE

MOUNTING FOOTPRINT

L0.19 REF

L2 0.05 0.10 0.15

0.35

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON26456D

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

SOT−963, 1X1, 0.35P

a a e lrademavks av Semxcunduclm Cnmvnnems In "sine \ghlsmanumhernlpalems \rademavks Dav www menu cumrsuerguwaxem Mavkmg gm 9 www nnserm cum

www.onsemi.com

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of ON Semiconductor’s product/patent

coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. ON Semiconductor reserves the right to make changes without further notice to any products herein.

ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability

arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.

Buyer is responsible for its products and applications using ON Semiconductor products, including compliance with all laws, regulations and safety requirements or standards,

regardless of any support or applications information provided by ON Semiconductor. “Typical” parameters which may be provided in ON Semiconductor data sheets and/or

specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer

application by customer’s technical experts. ON Semiconductor does not convey any license under its patent rights nor the rights of others. ON Semiconductor products are not

designed, intended, or authorized for use as a critical component in life support systems or any FDA Class 3 medical devices or medical devices with a same or similar classification

in a foreign jurisdiction or any devices intended for implantation in the human body. Should Buyer purchase or use ON Semiconductor products for any such unintended or unauthorized

application, Buyer shall indemnify and hold ON Semiconductor and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and

expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such

claim alleges that ON Semiconductor was negligent regarding the design or manufacture of the part. ON Semiconductor is an Equal Opportunity/Affirmative Action Employer. This

literature is subject to all applicable copyright laws and is not for resale in any manner.

PUBLICATION ORDERING INFORMATION

TECHNICAL SUPPORT

North American Technical Support:

Voice Mail: 1 800−282−9855 Toll Free USA/Canada

Phone: 011 421 33 790 2910

LITERATURE FULFILLMENT:

Email Requests to: orderlit@onsemi.com

ON Semiconductor Website: www.onsemi.com

Europe, Middle East and Africa Technical Support:

Phone: 00421 33 790 2910

For additional information, please contact your local Sales Representative

◊

Datenblatt für MUN5335DW1, NSBC123JPDxx von onsemi

INFORMATION

HILFE

KONTAKT

FOLGEN SIE UNS