Datenblatt für LTC3405A-1.5, 1.8 von Analog Devices Inc.

‘ ’ I t "p LTC3405A—1.5/LTC3405A-1.8 TECHNOLOGY [I w = 2.7V J _ .u— L7LJIJNW
1
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
High Efficiency: Up to 93%
Very Low Quiescent Current: Only 20
µ
A
During Operation
300mA Output Current at V
IN
= 3V
2.5V to 5.5V Input Voltage Range
1.5MHz Constant Frequency Operation
No Schottky Diode Required
Low Dropout Operation: 100% Duty Cycle
Stable with Ceramic Capacitors
Shutdown Mode Draws <1µA Supply Current
±3% Output Voltage Accuracy
Current Mode Operation for Excellent Line and
Load Transient Response
Overtemperature Protected
Low Profile (1mm) ThinSOT
TM
Package
The LTC
®
3405A-1.5/LTC3405A-1.8 are high efficiency
monolithic synchronous buck regulators using a constant
frequency, current mode architecture. Supply current
during operation is only 20µA and drops to <1µA in
shutdown. The 2.5V to 5.5V input voltage range makes the
LTC3405A-1.5/LTC3405A-1.8 ideally suited for single
Li-Ion battery-powered applications. 100% duty cycle
provides low dropout operation, extending battery life in
portable systems.
Switching frequency is internally set at 1.5MHz, allowing
the use of small surface mount inductors and capacitors.
The LTC3405A-1.5/LTC3405A-1.8 are specifically designed
to work well with ceramic output capacitors, achieving
very low output voltage ripple and a small PCB footprint.
The internal synchronous switch increases efficiency and
eliminates the need for an external Schottky diode. The
LTC3405A-1.5/LTC3405A-1.8 are available in a low profile
(1mm) ThinSOT package.
For adjustable output voltage, refer to the LTC3405A data
sheet.
Cellular Telephones
Personal Information Appliances
Wireless and DSL Modems
Digital Still Cameras
MP3 Players
Portable Instruments
Figure 1a. High Efficiency Step-Down Converter
1.5V, 1.8V, 1.5MHz, 300mA
Synchronous Step-Down
Regulators in ThinSOT
Figure 1b. Efficiency vs Load Current
, LTC and LT are registered trademarks of Linear Technology Corporation.
ThinSOT is a trademark of Linear Technology Corporation.
Protected by U.S. Patents, including 6580258, 5481178.
V
IN
C
IN
**
4.7µF
CER
V
IN
2.7V
TO 5.5V
*
**
LTC3405A-1.8
RUN
MODE
34.7µH*
3405A1518 F01
MURATA LQH3C4R7M34
TAIYO YUDEN JMK212BJ475MG
5
4
6
1
2
SW
V
OUT
GND
C
OUT
**
4.7µF
CER
V
OUT
1.8V
300mA
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
TYPICAL APPLICATIO
U
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10 1000
100
90
80
70
60
50
40
3405A1518 F01b
1 100
V
IN
= 2.7V
V
IN
= 5.5V
V
IN
= 4.2V
V
IN
= 3.6V
WU UUU L7LJIJEN2
2
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
I
PK
Peak Inductor Current V
IN
= 3V, V
OUT
= 90%, Duty Cycle < 35% 375 500 625 mA
V
OUT
Regulated Output Voltage LTC3405A-1.5, MODE = 3.6V 1.455 1.500 1.545 V
LTC3405A-1.8, MODE = 3.6V 1.746 1.800 1.854 V
V
OVL
Output Overvoltage Lockout V
OVL
= V
OVL
– V
OUT
2.5 7.8 13 %
V
OUT
Output Voltage Line Regulation V
IN
= 2.5V to 5.5V 0.04 0.4 %/V
V
LOADREG
Output Voltage Load Regulation 0.5 %
V
IN
Input Voltage Range 2.5 5.5 V
I
S
Input DC Bias Current (Note 4)
Pulse Skipping Mode V
OUT
= 90%, MODE = 3.6V, I
LOAD
= 0A 300 400 µA
Burst Mode® Operation V
OUT
= 103%, MODE = 0V, I
LOAD
= 0A 20 35 µA
Shutdown V
RUN
= 0V, V
IN
= 4.2V 0.1 1 µA
f
OSC
Oscillator Frequency V
OUT
= 100% 1.2 1.5 1.8 MHz
V
OUT
= 0V 170 kHz
R
PFET
R
DS(ON)
of P-Channel FET I
SW
= 100mA 0.7 0.85
R
NFET
R
DS(ON)
of N-Channel FET I
SW
= –100mA 0.6 0.90
I
LSW
SW Leakage V
RUN
= 0V, V
SW
= 0V or 5V, V
IN
= 5V ±0.01 ±1µA
V
RUN
RUN Threshold 0.3 1 1.5 V
I
RUN
RUN Leakage Current ±0.01 ±1µA
V
MODE
MODE Threshold 0.3 1.5 2 V
I
MODE
MODE Leakage Current ±0.01 ±1µA
LTC3405AES6-1.5
LTC3405AES6-1.8
T
JMAX
= 125°C, θ
JA
= 250°C/ W
ORDER PART
NUMBER
(Note 1)
Input Supply Voltage .................................. 0.3V to 6V
MODE, RUN, V
OUT
Voltages....................... 0.3V to V
IN
SW Voltage .................................. 0.3V to (V
IN
+ 0.3V)
P-Channel Switch Source Current (DC) ............. 400mA
N-Channel Switch Sink Current (DC) ................. 400mA
Peak SW Sink and Source Current .................... 630mA
Operating Temperature Range (Note 2) .. 40°C to 85°C
Junction Temperature (Note 3)............................ 125°C
Storage Temperature Range ................ 65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
S6 PART MARKING
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes specifications which apply over the full operating temperature range, otherwise specifications are TA = 25°C.
VIN = 3.6V unless otherwise specified.
LTZQ
LTZP
ABSOLUTE AXI U RATI GS
WWWU
PACKAGE/ORDER I FOR ATIO
UU
W
ELECTRICAL CHARACTERISTICS
RUN 1
GND 2
SW 3
6 MODE
5 V
OUT
4 V
IN
TOP VIEW
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
Burst Mode is a registered trademark of Linear Technology Corporation.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: The LTC3405AE is guaranteed to meet performance specifications
from 0°C to 70°C. Specifications over the –40°C to 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Note 3: T
J
is calculated from the ambient temperature T
A
and power
dissipation P
D
according to the following formula:
LTC3405A: T
J
= T
A
+ (P
D
)(250°C/W)
Note 4: Dynamic supply current is higher due to the gate charge being
delivered at the switching frequency.
Tm = TuumA lam = Tum lam = INA lam = 25umA lnm=fllmA EUTsl Mane OPERATTON Vnm=TBV 25 an 35 an 45 so 55 INPUT VOLTAGE (V) Tun WWW HHHH vwzzw en '\TTTTTT “ \vw=zav 5 2v 5 Tu m an 5n an [H T In Tun Tuuu OUTPUT CURRENT (mm Output Voltage vs Load Current EFFICIENCY (D FREDUENCV (MHZ) Tau vT =42v vN=aev5 vW=42 — -PULSE SKlPPING MODE —EUTStMOde OPERATTON Vnm=l ev OT T Tu TOO OUTPUT CURRENT (MA) Tuuu Oscillator Frequency vs emperature Tm VTN=35V T55 T50 T40 T35 T30 fan 725 u 25 50 T5 TEMPERATURE (“Cl Tuu I25 Huston) us Input Voltage 5 E OSCILLATOR EREUUENOV (MHZ) m “‘7’ Tue W=27v eu 70 so so 40 V“ a T I In Tau Tn OUTPUT CURRENT (mm Oscillator Frequency vs Supply Voltage V E T7 TE T5 T4 T3 T2 2 a a 5 e SUPPLV VOLTAGE (V) RDSlflNl vs Temperature l 2 Tu 05 04 02 ’50 ’25 U 25 50 75 TEMPERATURE we) Tau T2 3405mm L7LJL1WW 3
3
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
INPUT VOLTAGE (V)
2.5 3.0 4.0 5.0
EFFICIENCY (%)
4.5
95
90
85
80
75
70
65
60
55
50
3405A1518 G02
3.5 5.5
Burst Mode OPERATION
V
OUT
= 1.8V
I
OUT
= 0.1mA
I
OUT
= 250mA
I
OUT
= 100mA
I
OUT
= 10mA
I
OUT
= 1mA
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10 1000
100
90
80
70
60
50
40
30
20
10
0
3405A1518 G03
1 100
V
IN
= 3.6V
V
IN
= 4.2V
V
IN
= 3.6V
V
IN
= 4.2V
V
OUT
= 1.8V
PULSE SKIPPING MODE
Burst Mode OPERATION
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10 1000
100
90
80
70
60
50
40
3405A1518 G04
1 100
V
IN
= 2.7V
V
IN
= 5.5V
V
IN
= 4.2V
V
IN
= 3.6V
V
OUT
= 1.8V
TYPICAL PERFOR A CE CHARACTERISTICS
UW
OUTPUT CURRENT (mA)
60
EFFICIENCY (%)
80
100
50
70
90
0.1 10 100 1000
3405A1518 G05
40
1
VIN = 2.7V
VIN = 4.2V
VOUT = 1.5V
VIN = 3.6V
Efficiency vs Input Voltage Efficiency vs Output Current Efficiency vs Output Current
Efficiency vs Output Current
Oscillator Frequency vs
Temperature
Oscillator Frequency vs
Supply Voltage
Output Voltage vs Load Current RDS(ON) vs Input Voltage
TEMPERATURE (°C)
–50
FREQUENCY (MHz)
1.70
1.65
1.60
1.55
1.50
1.45
1.40
1.35
1.30
25 75
–25 0 50 100 125
V
IN
= 3.6V
3405A1518 G07
SUPPLY VOLTAGE (V)
2
OSCILLATOR FREQUENCY (MHz)
1.8
1.7
1.6
1.5
1.4
1.3
1.2 34 56
3405A1518 G08
LOAD CURRENT (mA)
0
OUTPUT VOLTAGE (V)
1.834
1.824
1.814
1.804
1.794
1.784
1.774 100 200 300 400
3405A1518 G09
500 600
Burst Mode
OPERATION
PULSE SKIPPING MODE
INPUT VOLTAGE (V)
0
RDS(0N) ()
245
3405A1518 G10
13 67
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
MAIN SWITCH
SYNCHRONOUS
SWITCH
(From Figure1a)
RDS(ON) vs Temperature
TEMPERATURE (°C)
–50
RDS(ON) ()
1.2
1.0
0.8
0.6
0.4
0.2
025 75
–25 0 50 100 125
3405F G11
SYNCHRONOUS SWITCH
MAIN SWITCH
VIN = 2.7V VIN = 3.6V
VIN = 4.2V
sme LEAKAGE (pm a so 50 40 an 20 m n ,53 725 u 25 50 75 mo I2 TEMPERATUREUC) 2 2 5 3 3 5 4 4 5 5 5 5 mm VOLTAGE (V) Switch Leakage vs Input anlage Burst Mada Operation RUN = nv I sw smcuaomous 5V/mv SWITCH / / Vow / mnmwmv / AC COUPLED L MAW sme IflflmA/DN // I 2 a 4 5 6 VW :3 av figs/UN WPUT VOLTAGE (V) Start-Up lrnm Shutdnwn Lna Vow RUN womvxri‘uc/ 2WD” COUPLED Vnur VV/DIV ‘1 ZUUMNDW L zanmA/uw ‘LnAD ZUUMNDW mnuymv \an : 250qu w W M; M ‘SWLTCH WLTCH u 750 725 a 25 50 75 mo ‘2 TEMPERATURE 1°C) mu :3 av vumzw sv mm] : 2am sunnymv mummy L7
4
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
Dynamic Supply Current
vs Supply Voltage
Dynamic Supply Current
vs Temperature Switch Leakage vs Temperature
Switch Leakage vs Input Voltage
SUPPLY VOLTAGE (V)
2
0
SUPPLY CURRENT (µA)
200
600
800
1000
4
1800
3405A1518 G12
400
3
2.5 4.5 5
3.5 5.5
1200
1400
1600
PULSE SKIPPING MODE
BURST MODE OPERATION
VOUT = 1.8V
ILOAD = 0A
TEMPERATURE (°C)
–50
SWITCH LEAKAGE (nA)
160
140
120
100
80
60
40
20
025 75
–25 0 50 100 125
V
IN
= 5.5V
RUN = 0V
3405F G14
MAIN SWITCH
SYNCHRONOUS
SWITCH
INPUT VOLTAGE (V)
0
SWITCH LEAKAGE (pA)
60
50
40
30
20
10
01234
3405F G15
56
RUN = 0V
MAIN SWITCH
SYNCHRONOUS
SWITCH
SW
5V/DIV
V
OUT
100mV/DIV
AC COUPLED
I
L
100mA/DIV
3405A1518 G16
5µs/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD =
20mA
SW
5V/DIV
V
OUT
10mV/DIV
AC
COUPLED
I
L
100mA/DIV
3405A1518 G17
500ns/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD =
20mA
RUN
2V/DIV
V
OUT
1V/DIV
I
L
200mA/DIV
3405A1518 G18
100µs/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD =
250mA
3405A1518 G19
VOUT
100mV/DIV
AC
COUPLED
ILOAD
200mA/DIV
IL
200mA/DIV
40µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 0mA TO 250mA
PULSE SKIPPING MODE
TYPICAL PERFOR A CE CHARACTERISTICS
UW
(From Figure 1a)
Burst Mode Operation Pulse Skipping Mode Operation
Start-Up from Shutdown Load Step
TEMPERATURE (°C)
–50
300
340
25 75
3405A1518 G13
260
–25 0 50 100 125
220
180
140
100
60
20
0
SUPPLY CURRENT (µA)
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD
= 0A
PULSE SKIPPING MODE
BURST MODE OPERATION
Vw=36V Anyiyoiv viN=asv Anus/Dill Gains/DIV Vamzl av yam: 1 av um : ZflmA ro zsomA um : 20m to 25cm . PULSE SKIPPlNG MODE “mm" Bulsl Made DPERATlDN «Wm WM RUN (Pint): Run Control Input. Forcing this pin above 1.5V enables the part. Forcing this pin below 0.3V shuts down the device. In shutdown, all functions are disabled drawing <1 ua="" supply="" current.="" do="" not="" leave="" run="" floating.="" gnd="" (pin="" 2):="" ground="" pin.="" sw="" (pin="" 3):="" switch="" node="" connection="" to="" inductor.="" this="" pin="" connects="" to="" the="" drains="" of="" the="" internal="" main="" and="" synchro-="" nous="" power="" mosfet="" switches.="" vin="" (pin="" 4]:="" main="" supply="" pin.="" must="" be="" closely="" decoupled="" to="" gnd,="" pin="" 2,="" with="" a="" 2.2uf="" or="" greater="" ceramic="" capacitor.="" vom="" (pin="" 5):="" output="" voltage="" feedback="" pin.="" an="" internal="" resistive="" divider="" divides="" the="" output="" voltage="" down="" for="" com-="" parison="" to="" the="" internal="" 1.2v="" reference="" voltage.="" mode="" (pin="" 6]:="" mode="" select="" input.="" to="" select="" pulse="" skip-="" ping="" mode,="" tie="" to="" vin.="" grounding="" this="" pin="" selects="" burst="" mode="" operation.="" do="" not="" leave="" this="" pin="" floating.="" mm="" 5i="" bla="" l7ljl1ww="" 5="">
5
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
UU
U
PI FU CTIO S
RUN (Pin 1): Run Control Input. Forcing this pin above
1.5V enables the part. Forcing this pin below 0.3V shuts
down the device. In shutdown, all functions are disabled
drawing <1µA supply current. Do not leave RUN floating.
GND (Pin 2): Ground Pin.
SW (Pin 3): Switch Node Connection to Inductor. This pin
connects to the drains of the internal main and synchro-
nous power MOSFET switches.
V
IN
(Pin 4): Main Supply Pin. Must be closely decoupled
to GND, Pin 2, with a 2.2µF or greater ceramic capacitor.
V
OUT
(Pin 5): Output Voltage Feedback Pin. An internal
resistive divider divides the output voltage down for com-
parison to the internal 1.2V reference voltage.
MODE (Pin 6): Mode Select Input. To select pulse skip-
ping mode, tie to V
IN
. Grounding this pin selects Burst
Mode operation. Do not leave this pin floating.
3405A1518 G20
VOUT
100mV/DIV
AC
COUPLED
ILOAD
200mA/DIV
IL
200mA/DIV
40µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 20mA TO 250mA
PULSE SKIPPING MODE
VOUT
100mV/DIV
AC
COUPLED
ILOAD
200mA/DIV
IL
200mA/DIV
3405A1518 G21
40µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 20mA TO 250mA
Burst Mode OPERATION 3405A1518 G22
40µs/DIV
VIN = 3.6V
VOUT = 1.8V
ILOAD = 0mA TO 250mA
Burst Mode OPERATION
VOUT
100mV/DIV
AC
COUPLED
ILOAD
200mA/DIV
IL
200mA/DIV
TYPICAL PERFOR A CE CHARACTERISTICS
UW
Load Step Load Step Load Step
(From Figure 1a)
I DC - N rxso D vim SHlFT , f ch34osms m Rl=ll0k _‘2V 3 R2=440k . chaaosma Rl=l80k R2=350k T __||— | i: i— l— Vw | Run E—VZVREF 7 ._ D DVDE 0" :n— now + H suuroowu ‘ * new D OPEBflTlon (Helerlo Functional Diagram) Main Control Loop The LTCS405A Fixed output voltage series parts use a constant frequency, current mode step-down architec» ture. Their main (P-channel MOSFET) and synchronous (N»channel MOSFET) switches are internal. During normal operation, the internal top power MOSFET is turned on each cyclewhenthe oscillatorsetsthe RSlatch,andtumed off when the current comparator, lcowi resets the RS latch. The peak inductor current at which lcow resets the RS latch, is controlled by the output of error amplifier EA. When the load current increases, the output voltage de- creases which causes a slight decrease in VH3 relative to the1.ZVreference,whichinturn,causesthe EAampln‘ier‘s output voltage to increase until the average inductor current matches the new load current. While the top MOSFET is off, the bottom MOSFET is turned on until eitherthe inductorcurrent startsto reverse, as indicated by the current reversal comparator IRCMP, orthe beginning of the next clock cycle. Comparator OVDET guards against transient overshoots >7.8% by turning the main switch off and keeping it off until the fault is removed. Burst Mode Operation The LTCS405A series parts are capable of Burst Mode operation in which the internal power MOSFETs operate intermittently based on load demand. To enable Burst Modeoperation,simply connectthe MODE pinto GNDTo disable Burst Mode operation and enable PWM pulse skipping mode, connect the MODE pin to ViN or drive it With a logic high (VMODE > 1.5V). In this mode, the efficiency is lowerat light loads, but becomes comparable to Burst Mode operation when the output load exceeds 25mA. The advantage of pulse skipping mode is lower output ripple and less interference to audio circuitry. Imusalstata 6 L7Hfl$
6
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
FU CTIO AL DIAGRA
UU
W
OPERATIO
U
(Refer to Functional Diagram)
Main Control Loop
The LTC3405A Fixed output voltage series parts use a
constant frequency, current mode step-down architec-
ture. Their main (P-channel MOSFET) and synchronous
(N-channel MOSFET) switches are internal. During normal
operation, the internal top power MOSFET is turned on
each cycle when the oscillator sets the RS latch, and turned
off when the current comparator, I
COMP
, resets the RS
latch. The peak inductor current at which I
COMP
resets the
RS latch, is controlled by the output of error amplifier EA.
When the load current increases, the output voltage de-
creases which causes a slight decrease in V
FB
relative to
the 1.2V reference, which in turn, causes the EA amplifier’s
output voltage to increase until the average inductor
current matches the new load current. While the top
MOSFET is off, the bottom MOSFET is turned on until
either the inductor current starts to reverse, as indicated by
the current reversal comparator I
RCMP
, or the beginning of
the next clock cycle.
Comparator OVDET guards against transient overshoots
>7.8% by turning the main switch off and keeping it off
until the fault is removed.
Burst Mode Operation
The LTC3405A series parts are capable of Burst Mode
operation in which the internal power MOSFETs operate
intermittently based on load demand. To enable Burst
Mode operation, simply connect the MODE pin to GND. To
disable Burst Mode operation and enable PWM pulse
skipping mode, connect the MODE pin to V
IN
or drive it
with a logic high (V
MODE
> 1.5V). In this mode, the
efficiency is lower at light loads, but becomes comparable
to Burst Mode operation when the output load exceeds
25mA. The advantage of pulse skipping mode is lower
output ripple and less interference to audio circuitry.
+
+
+
+
OVDET
EA
+
I
RCMP
+
I
COMP
5
1
RUN
OSC
SLOPE
COMP
OSC
FREQ
SHIFT
1.2V
R1
LTC3405A-1.5
R1 = 110k
R2 = 440k
LTC3405A-1.8
R1 = 180k
R2 = 360k
R2
1.294V
1.2V REF
SHUTDOWN
OV
0.4V
0.65V
SLEEP
V
IN
V
OUT
6
MODE
EN
BURST
V
IN
S
R
RS LATCH SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
ANTI-
SHOOT-
THRU
Q
Q
5
4
SW
3
GND
3405A1518 BD
2
V
FB
L7LJL1WW
7
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
OPERATIO
U
(Refer to Functional Diagram)
When the converter is in Burst Mode operation, the peak
current of the inductor is set to approximately 100mA re-
gardless of the output load. Each burst event can last from
a few cycles at light loads to almost continuously cycling
with short sleep intervals at moderate loads. In between
these burst events, the power MOSFETs and any unneeded
circuitry are turned off, reducing the quiescent current to
20µA. In this sleep state, the load current is being supplied
solely from the output capacitor. As the output voltage
droops, the EA amplifier’s output rises above the sleep
threshold signaling the BURST comparator to trip and turn
the top MOSFET on. This process repeats at a rate that is
dependent on the load demand.
Short-Circuit Protection
When the output is shorted to ground, the frequency of the
oscillator is reduced to about 210kHz, 1/7 the nominal
frequency. This frequency foldback ensures that the in-
ductor current has more time to decay, thereby preventing
runaway. The oscillator’s frequency will progressively
increase to 1.5MHz when V
OUT
rises above 0V.
Low Supply Operation
The LTC3405A series parts will operate with input supply
voltages as low as 2.5V, but the maximum allowable
output current is reduced at this low voltage. Figure 2
shows the reduction in the maximum output current as a
function of input voltage for both fixed output voltages.
Figure 2. Maximum Output Current vs Input Voltage
SUPPLY VOLTAGE (V)
2.5
MAXIMUM OUTPUT CURRENT (mA)
600
500
400
300
200
100
03.0 3.5 4.0 4.5
3405A1518 F02
5.0 5.5
V
OUT
= 1.8V
V
OUT
= 1.5V
Slope Compensation and Inductor Peak Current
Slope compensation provides stability in constant fre-
quency architectures by preventing subharmonic oscilla-
tions at high duty cycles. It is accomplished internally by
adding a compensating ramp to the inductor current
signal at duty cycles in excess of 40%. Normally, this
results in a reduction of maximum inductor peak current
for duty cycles >40%. However, the LTC3405A series
parts use a patent-pending scheme that counteracts this
compensating ramp, which allows the maximum inductor
peak current to remain unaffected throughout all duty
cycles.
L7LJIJEN2
8
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
APPLICATIO S I FOR ATIO
WUUU
Table 1. Representative Surface Mount Inductors
MAX DC
MANUFACTURER PART NUMBER VALUE CURRENT DCR HEIGHT
Taiyo Yuden LB2016T2R2M 2.2µH 315mA 0.131.6mm
LB2012T2R2M 2.2µH 240mA 0.231.25mm
LB2016T3R3M 3.3µH 280mA 0.21.6mm
Panasonic ELT5KT4R7M 4.7µH 950mA 0.21.2mm
Murata LQH32CN2R2M33 4.7µH 450mA 0.22mm
Taiyo Yuden LB2016T4R7M 4.7µH 210mA 0.251.6mm
Panasonic ELT5KT6R8M 6.8µH 760mA 0.31.2mm
Panasonic ELT5KT100M 10µH 680mA 0.361.2mm
Sumida CMD4D116R8MC 6.8µH 620mA 0.231.2mm
The basic LTC3405A series parts application circuit is
shown in Figure 1. External component selection is driven
by the load requirement and begins with the selection of L
followed by C
IN
and C
OUT
.
Inductor Selection
For most applications, the inductor value will fall in the
range of 2.2µH to 10µH. Its value is determined by the
desired ripple current. Large value inductors lower ripple
current and small value inductors result in higher ripple
currents. Higher V
IN
or V
OUT
also increases the ripple
current as shown in equation 1. A reasonable starting point
for setting ripple current is I
L
= 120mA (40% of 300mA).
=
()( )
IfLVV
V
L OUT OUT
IN
11
(1)
The DC current rating of the inductor should be at least
equal to the maximum load current plus half the ripple
current to prevent core saturation. Thus, a 360mA rated
inductor should be enough for most applications (300mA
+ 60mA). For better efficiency, choose a low DC-resistance
inductor.
The inductor value also has an effect on Burst Mode
operation. The transition to low current operation begins
when the inductor current peaks fall to approximately
100mA. Lower inductor values (higher I
L
) will cause this
to occur at lower load currents, which can cause a dip in
efficiency in the upper range of low current operation. In
Burst Mode operation, lower inductance values will cause
the burst frequency to increase.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Tor-
oid or shielded pot cores in ferrite or permalloy materials
are small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style induc-
tor to use often depends more on the price vs size require-
ments and any radiated field/EMI requirements than on
what the LTC3405A series parts require to operate. Table
1 shows some typical surface mount inductors that work
well in LTC3405A series parts applications.
C
IN
and C
OUT
Selection
In continuous mode, the source current of the top MOSFET
is a square wave of duty cycle V
OUT
/V
IN
. To prevent large
voltage transients, a low ESR input capacitor sized for the
maximum RMS current must be used. The maximum
RMS capacitor current is given by:
CI
VVV
V
IN OMAX
OUT IN OUT
IN
required I
RMS
()
[]
12/
This formula has a maximum at V
IN
= 2V
OUT
, where
I
RMS
= I
OUT
/2. This simple worst-case condition is com-
monly used for design because even significant deviations
do not offer much relief. Note that the capacitor
manufacturer’s ripple current ratings are often based on
2000 hours of life. This makes it advisable to further derate
the capacitor, or choose a capacitor rated at a higher
temperature than required. Always consult the manufac-
turer if there is any question.
The selection of C
OUT
is driven by the required effective
series resistance (ESR). Typically, once the ESR require-
ment for C
OUT
has been met, the RMS current rating
generally far exceeds the I
RIPPLE(P-P)
requirement. The
output ripple V
OUT
is determined by:
∆≅+
V I ESR fC
OUT L OUT
1
8
where f = operating frequency, C
OUT
= output capacitance
and I
L
= ripple current in the inductor. For a fixed output
voltage, the output ripple is highest at maximum input
voltage since I
L
increases with input voltage.
becoming available in smaller case sizes. Their high ripple current, high voltage rating and low ESR make them ideal forswitching regulatorapplications. Becausethe LTCS405A series’ control loop does not depend on the output capacitor‘s ESR for stable operation, ceramic capacitors can be used freely to achieve very low output ripple and small circurt size. Care must be taken when ceramic capacitors are used at the inputandtheoutput. Whenaceramic capacitoris used at the input and the power is supplied by a wall adapter through long wires, a load step at the output can induce ringing at the input, VW. At best,this ringing can coupleto the output and be mistaken as loop instability. At worst, a sudden inrush of current through the long wires can potentially cause a voltage spike at VIN, large enough to damage the part. When choosing the input and output ceramic capacitors, choose the X5R or X7R dielectric formulations. These dielectrics have the best temperature and voltage charac- teristics of all the ceramics for a given value and srze. Efficiency Considerations The efficrency of a switching regulator is equal to the output powerdivided by the input powertimes100%. It is often useful to analyze indivrdual losses to determine what is limiting the efficiency and which change would produce the most improvement. Efficiency can be expressed as: Efficiency =100% 7 (L1 + L2 + L3 + ...) of cm PUWER LUST (W) o om ooom 01 l to too to LOAD CURRENT (mA) Figure 3. iner Lust vs Lnad Curran L7LJIJE/AE
9
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
APPLICATIO S I FOR ATIO
WUUU
where L1, L2, etc. are the individual losses as a percentage
of input power.
Although all dissipative elements in the circuit produce
losses, two main sources usually account for most of the
losses in LTC3405A
series parts
circuits: V
IN
quiescent
current and I
2
R losses. The V
IN
quiescent current loss
dominates the efficiency loss at very low load currents
whereas the I
2
R loss dominates the efficiency loss at
medium to high load currents. In a typical efficiency plot,
the efficiency curve at very low load currents can be
misleading since the actual power lost is of no conse-
quence as illustrated in Figure 3.
Aluminum electrolytic and dry tantalum capacitors are
both available in surface mount configurations. In the case
of tantalum, it is critical that the capacitors are surge tested
for use in switching power supplies. An excellent choice is
the AVX TPS series of surface mount tantalum. These are
specially constructed and tested for low ESR so they give
the lowest ESR for a given volume. Other capacitor types
include Sanyo POSCAP, Kemet T510 and T495 series, and
Sprague 593D and 595D series. Consult the manufacturer
for other specific recommendations.
Using Ceramic Input and Output Capacitors
Higher values, lower cost ceramic capacitors are now
becoming available in smaller case sizes. Their high ripple
current, high voltage rating and low ESR make them ideal
for switching regulator applications. Because the LTC3405A
series’ control loop does not depend on the output
capacitor’s ESR for stable operation, ceramic capacitors
can be used freely to achieve very low output ripple and
small circuit size.
Care must be taken when ceramic capacitors are used at
the input and the output. When a ceramic capacitor is used
at the input and the power is supplied by a wall adapter
through long wires, a load step at the output can induce
ringing at the input, V
IN
. At best, this ringing can couple to
the output and be mistaken as loop instability. At worst, a
sudden inrush of current through the long wires can
potentially cause a voltage spike at V
IN
, large enough to
damage the part.
When choosing the input and output ceramic capacitors,
choose the X5R or X7R dielectric formulations. These
dielectrics have the best temperature and voltage charac-
teristics of all the ceramics for a given value and size.
Efficiency Considerations
The efficiency of a switching regulator is equal to the
output power divided by the input power times 100%. It is
often useful to analyze individual losses to determine what
is limiting the efficiency and which change would produce
the most improvement. Efficiency can be expressed as:
Efficiency = 100% – (L1 + L2 + L3 + ...)
Figure 3. Power Lost vs Load Current
LOAD CURRENT (mA)
0.1
POWER LOST (W)
10 1000
1
0.1
0.01
0.001
0.0001
3405A1518 F03
1 100
V
OUT
= 1.8V
V
IN
= 3.6V
V
OUT
= 1.5V
1. The V
IN
quiescent current is due to two components:
the DC bias current as given in the electrical character-
istics and the internal main switch and synchronous
switch gate charge currents. The gate charge current
results from switching the gate capacitance of the
internal power MOSFET switches. Each time the gate is
switched from high to low to high again, a packet of
charge, dQ, moves from V
IN
to ground. The resulting
dQ/dt is the current out of V
IN
that is typically larger than
the DC bias current. In continuous mode, I
GATECHG
=
f(Q
T
+ Q
B
) where Q
T
and Q
B
are the gate charges of the
internal top and bottom switches. Both the DC bias and
gate charge losses are proportional to V
IN
and thus
their effects will be more pronounced at higher supply
voltages.
L7LJIJEN2
10
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
APPLICATIO S I FOR ATIO
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2. I
2
R losses are calculated from the resistances of the
internal switches, R
SW
, and external inductor R
L
. In
continuous mode, the average output current flowing
through inductor L is “chopped” between the main
switch and the synchronous switch. Thus, the series
resistance looking into the SW pin is a function of both
top and bottom MOSFET R
DS(ON)
and the duty cycle
(DC) as follows:
R
SW
= (R
DS(ON)TOP
)(DC) + (R
DS(ON)BOT
)(1 – DC)
The R
DS(ON)
for both the top and bottom MOSFETs can
be obtained from the Typical Performance Charateristics
curves. Thus, to obtain I
2
R losses, simply add R
SW
to
R
L
and multiply the result by the square of the average
output current.
Other losses including C
IN
and C
OUT
ESR dissipative
losses and inductor core losses generally account for less
than 2% total additional loss.
Thermal Considerations
In most applications, the LTC3405A
series parts
do not
dissipate much heat due to their high efficiency. But, in
applications where they run at high ambient temperature
with low supply voltage, the heat dissipated may exceed
the maximum junction temperature of the part. If the
junction temperature reaches approximately 150°C, both
power switches will be turned off and the SW node will
become high impedance.
To keep the LTC3405A
series parts
from exceeding the
maximum junction temperature, the user will need to do
some thermal analysis. The goal of the thermal analysis is
to determine whether the power dissipated exceeds the
maximum junction temperature of the part. The tempera-
ture rise is given by:
T
R
= (P
D
)(θ
JA
)
where P
D
is the power dissipated by the regulator and θ
JA
is the thermal resistance from the junction of the die to the
ambient temperature.
The junction temperature, T
J
, is given by:
T
J
= T
A
+ T
R
where T
A
is the ambient temperature.
As an example, consider the LTC3405A-1.8 with an input
voltage of 2.7V, a load current of 300mA and an ambient
temperature of 70°C. From the typical performance graph
of switch resistance, the R
DS(ON)
of the P-channel switch
at 70°C is approximately 0.94 and the R
DS(ON)
of the
N-channel synchronous switch is approximately 0.75.
The series resistance looking into the SW pin is:
R
SW
= 0.95 (0.67) + 0.75 (0.33) = 0.88
Therefore, power dissipated by the part is:
P
D
= I
LOAD2
• R
SW
= 79.2mW
For the SOT-23 package, the θ
JA
is 250°C/W. Thus, the
junction temperature of the regulator is:
T
J
= 70°C + (0.0792)(250) = 89.8°C
which is well below the maximum junction temperature of
125°C.
Note that at higher supply voltages, the junction tempera-
ture is lower due to reduced switch resistance (R
DS(ON)
).
Checking Transient Response
The regulator loop response can be checked by looking at
the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shifts by an amount
equal to (I
LOAD
• ESR), where ESR is the effective series
resistance of C
OUT
. I
LOAD
also begins to charge or
discharge C
OUT
, which generates a feedback error signal.
The regulator loop then acts to return V
OUT
to its steady-
state value. During this recovery time V
OUT
can be moni-
tored for overshoot or ringing that would indicate a stability
problem. For a detailed explanation of switching control
loop theory, see Application Note 76.
Vw \ w . 1 cm [ . 1 cm [ BOLD UNES wmcmE HIGH cumm PATHS 6"” re 4. LTDSdflfiA-LE Layout Diagram Figure 5. LEMMA-1.8 Suggeslad Laynu L7LJL1WW
11
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
APPLICATIO S I FOR ATIO
WUUU
Figure 4. LTC3405A-1.8 Layout Diagram Figure 5. LTC3405A-1.8 Suggested Layout
RUN
LTC3405A-1.8
GND
SW
6
L1
BOLD LINES INDICATE HIGH CURRENT PATHS
V
IN
V
OUT
3405A1518 F04
4
5
1
3
+
2
MODE
V
OUT
V
IN
C
IN
C
OUT
LTC3405A-1.8
GND
3405A1518 F05
PIN 1
V
OUT
V
IN
SW
VIA TO V
IN
C
OUT
C
IN
L1
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of the
LTC3405A series parts. These items are also illustrated
graphically in Figures 4 and 5. Check the following in your
layout:
1. The power traces, consisting of the GND trace, the SW
trace and the V
IN
trace should be kept short, direct and
wide.
2. Does the (+) plate of C
IN
connect to V
IN
as closely as
possible? This capacitor provides the AC current to the
internal power MOSFETs.
3. Keep the (–) plates of C
IN
and C
OUT
as close as possible.
Design Example
As a design example, assume the LTC3405A-1.8 is used
in a single lithium-ion battery-powered cellular phone
application. The V
IN
will be operating from a maximum of
4.2V down to about 2.7V. The load current requirement
is a maximum of 0.25A but most of the time it will be in
standby mode, requiring only 2mA. Efficiency at both low
and high load currents is important. Output voltage is
1.8V. With this information we can calculate L using
equation (1),
LfI
VV
V
LOUT OUT
IN
=
()
()
11
(3)
Substituting V
OUT
= 1.8V, V
IN
= 4.2V, I
L
= 100mA and
f = 1.5MHz in equation (3) gives:
LV
MHz mA
V
VH=
µ
18
1 5 100 118
42 68
.
.( )
.
..
For best efficiency choose a 300mA or greater inductor
with less than 0.3 series resistance.
C
IN
will require an RMS current rating of at least 0.125A
I
LOAD(MAX)
/2 at temperature and C
OUT
will require an ESR
of less than 0.5. In most cases, a tantalum capacitor will
satisfy this requirement.
Figure 6 shows the complete circuit along with its effi-
ciency curve.
H J u”— we so EFFICIENCY (m 50 30 m w m we we OUTPUT CURRENT (mA) VuuT wumwmv AC COUPLED ‘L zuumA/mv ‘L zuumA/mv vw = 3 av zanymv vow a av INN] : IUDmA m acumA
12
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
V
OUT
100mV/DIV
AC COUPLED
I
L
200mA/DIV
I
L
200mA/DIV
3405A1518 F06c
20µs/DIV
V
IN
= 3.6V
V
OUT
= 1.8V
I
LOAD =
100mA TO 300mA
APPLICATIO S I FOR ATIO
WUUU
OUTPUT CURRENT (mA)
50
EFFICIENCY (%)
70
90
100
0.1 10 100 1000
3405A1518 F06b
30
1
60
60
40
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
V
IN
C
IN
**
4.7µF
CER
V
IN
2.7V
TO 4.2V LTC3405A-1.8
RUN
MODE
36.8µH*
3405A1518 F06a
5
4
6
1
2
SW
V
OUT
GND
C
OUT
**
4.7µF
CER
V
OUT
1.8V
*SUMIDA CMD4D11-6R8MC
** TAIYO YUDEN JMK212BJ475MG
Figure 6a.
Figure 6b.
Figure 6c.
L7LJL1WW um an EFFICIENCV (m an m u / Vw \ In um um OUTPUT CURRENT (mA) 2anme
13
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
TYPICAL APPLICATIO S
U
Single Li-Ion to 1.5V/300mA Regulator
for High Efficiency and Small Footprint
V
IN
C
IN
**
4.7µF
CER
V
IN
2.7V
TO 4.2V LTC3405A-1.5
RUN
MODE
34.7µH*
3405A1518 TA02a
5
4
6
1
2
SW
V
OUT
GND
C
OUT1
**
4.7µF
CER
V
OUT
1.5V
*
**
MURATA LQH32CN4R7M33
TAIYO YUDEN CERAMIC JMK212BJ475MG
OUTPUT CURRENT (mA)
50
EFFICIENCY (%)
70
90
100
0.1 10 100 1000
3405A1518 TA02b
30
1
60
60
40
V
IN
= 2.7V
V
IN
= 4.2V
V
IN
= 3.6V
V
OUT
100mV/DIV
AC COUPLED
I
L
200mA/DIV
I
L
200mA/DIV
3405A1518 TA02c
20µs/DIV
V
IN
= 3.6V
V
OUT
= 1.5V
I
LOAD =
100mA TO 300mA
14 £1 .||—| EFFICIENCY (m 90 an 7o 60 50 40 an .||—| I”— \HHHH y‘N |\ m I In me In OUTPUT CURRENT (mA) mus/0W L7LJIJEN2
14
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
TYPICAL APPLICATIO S
U
V
IN
C
IN
**
2.2µF
CER
V
IN
2.7V
TO 4.2V LTC3405A-1.5
RUN
MODE
32.2µH*
3405A1518 TA03a
5
4
6
1
2
SW
V
OUT
GND
C
OUT1
**
2.2µF
CER
V
OUT
1.5V
*
**
TAIYO YUDEN LB2012T2R2M
TAIYO YUDEN CERAMIC LMK212BJ225MG
OUTPUT CURRENT (mA)
0.1
EFFICIENCY (%)
10 1000
90
80
70
60
50
40
30
3405A1518 TA03b
1 100
V
IN
= 2.7V
V
IN
= 4.2V
V
OUT
= 1.5V
V
IN
= 3.6V
V
OUT
100mV/DIV
AC COUPLED
I
L
100mA/DIV
I
L
200mA/DIV
3405A1518 TA03c
20µs/DIV
V
IN
= 3.6V
V
OUT
= 1.5V
I
LOAD =
50mA TO 150mA
Single Li-Ion to 1.5V/150mA Regulator
Using All Ceramic Capacitors Optimized for Smallest Footprint
SEEMAX *+ :[IT A l 7+++ u 20 BSC 177 ¢ DATUM ‘A‘ :¢ ‘ x T 4‘ L; 0307050 NOTE I D‘MENSIDNS ARE IN MILUMETERS 2 DRAWWG NOT TO SCALE 3 D‘MENSIDNS ARE INCLUSWE DE mm a D‘MENSIDMSARE EXCLUSIVE OEMOLD 5 MOLD FLASH SHALL NOT EXCEED u 25 5 JEDEC PACKAGE REFERENCE ‘8 M049 3mm 5‘ am mmmnan mmsnea by Lmanv Technolugy Cavpuvalmn \s behaved m be mums and vehnble ‘ ’ LINEAR mev nuvesnunsmmtwsassumedVamsusa LmaanecnnolugyCmpuvalmnmakesnuraprasenr Emwuw talmnmamaImemnnnachunuhlscmunsasdescflbenharemwmnutmmngeonexustmqpatenmgms
15
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
U
PACKAGE DESCRIPTIO
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX 0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
L7LJIJEN2
16
LTC3405A-1.5/LTC3405A-1.8
3405a1518fa
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PART NUMBER DESCRIPTION COMMENTS
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= 20µA
DC/DC Converter I
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= <1µA, ThinSOT Package
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= <1µA, ThinSOT Package
LTC3411 1.25A (I
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= <1µA, MS10 Package
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), 4MHz, Synchronous Step-Down 95% Efficiency, V
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= 2.5V to 5.5V, V
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= 0.8V, I
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= 60µA
DC/DC Converter I
SD
= <1µA, TSSOP16E Package
LTC3413 3A (I
OUT
), Sink/Source, 2MHz, Monolithic Synchronous 90% Efficiency, V
IN
= 2.25V to 5.5V, V
OUT
= V
REF/2
, I
Q
= 280µA
Regulator for DDR/QDR Memory Termination I
SD
= <1µA, TSSOP16E Package
LT3430 60V, 2.75A (I
OUT
), 200kHz, High Efficiency Step-Down 90% Efficiency, V
IN
= 5.5V to 60V, V
OUT
= 1.20V, I
Q
= 2.5mA
DC/DC Converter I
SD
= 25µA, TSSOP16E Package
LTC3440 600mA (I
OUT
), 2MHz, Synchronous Buck-Boost 95% Efficiency, V
IN
= 2.5V to 5.5V, V
OUT
= 2.5V, I
Q
= 25µA
DC/DC Converter I
SD
= <1µA, MS Package
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900
FAX: (408) 434-0507
www.linear.com
LT/TP 0604 1K REV A • PRINTED IN USA
© LINEAR TECHNOLOGY CORPORATION 2002