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NX3L2467

Dual low-ohmic double-pole double-throw analog switch

Rev. 5.1 — 18 May 2021 Product data sheet

1 General description

The NX3L2467 is a dual low-ohmic double-pole double-throw analog switch suitable for

use as an analog or digital multiplexer/demultiplexer. It consists of four switches, each

with two independent input/outputs (nY0 and nY1) and a common input/output (nZ).

The two digital inputs (1S and 2S) are used to select the switch position. 1S is used

in selecting the independent inputs/outputs switched to 1Z and 2Z, and 2S is used in

selecting the independent inputs/outputs switched to 3Z and 4Z. Schmitt trigger action

at the digital inputs makes the circuit tolerant to slower input rise and fall times. Low

threshold digital inputs allows this device to be driven by 1.8 V logic levels in 3.3 V

applications without significant increase in supply current ICC. This makes it possible

for the NX3L467 to switch 4.3 V signals with a 1.8 V digital controller, eliminating the

need for logic level translation. The NX3L2467 allows signals with amplitude up to VCC

to be transmitted from nZ to nY0 or nY1; or from nY0 or nY1 to nZ. Its low ON resistance

(0.5 Ω) and flatness (0.13 Ω) ensures minimal attenuation and distortion of transmitted

signals.

2 Features and benefits

•Wide supply voltage range from 1.4 V to 4.3 V

•Very low ON resistance (peak):

–1.7 Ω (typical) at VCC = 1.4 V

–1.0 Ω (typical) at VCC = 1.65 V

–0.6 Ω (typical) at VCC = 2.3 V

–0.5 Ω (typical) at VCC = 2.7 V

–0.5 Ω (typical) at VCC = 4.3 V

•Break-before-make switching

•High noise immunity

•ESD protection:

–HBM JESD22-A114F Class 3A exceeds 4000 V

–MM JESD22-A115-A exceeds 200 V

–CDM AEC-Q100-011 revision B exceeds 1000 V

–IEC61000-4-2 contact discharge exceeds 6000 V for switch ports

•CMOS low-power consumption

•Latch-up performance exceeds 100 mA per JESD 78B Class II Level A

•1.8 V control logic at VCC = 3.6 V

•Control input accepts voltages above supply voltage

•Very low supply current, even when input is below VCC

•High current handling capability (350 mA continuous current under 3.3 V supply)

•Specified from -40 °C to +85 °C and from -40 °C to +125 °C

NX3L2467

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

3 Applications

•Cell phone

•PDA

•Portable media player

4 Ordering information

PackageType number Topside

mark Name Description Version

NX3L2467PW X3L2467 TSSOP16 plastic thin shrink small outline package; 16

leads; body width 4.4 mm

SOT403-1

NX3L2467HR D67 HXQFN16 plastic thermal enhanced extremely thin quad

flat package; no leads; 16 terminals; body 3 × 3

× 0.5 mm

SOT1039-2

NX3L2467GU D67 XQFN16 plastic, extremely thin quad flat package; no

leads; 16 terminals; body 1.80 × 2.60 × 0.50 mm

SOT1161-1

Table 1. Ordering information

4.1 Ordering options

Type number Orderable part number Package Packing method Minimum

order

quantity

Temperature

NX3L2467PW NX3L2467PW,118 TSSOP16 Reel 13" Q1/T1 NDP 2500 Tamb = -40 °C to +125 °C

NX3L2467HRZ HXQFN16 Reel 7" Q1/T1 NDP

SSB [1] 1500 Tamb = -40 °C to +125 °CNX3L2467HR

NX3L2467HR,115 [2] HXQFN16 Reel 7" Q1/T1 NDP 1500 Tamb = -40 °C to +125 °C

NX3L2467GU NX3L2467GU,115 XQFN16 Reel 7" Q1/T1 NDP 4000 Tamb = -40 °C to +125 °C

Table 2. Ordering options

[1] This packing method uses a Static Shielding Bag (SSB) solution. Material is to be kept in the sealed bag between uses.

[2] Will go EOL - migrate to new leadframe NX3L2467HRZ orderable part number.

Product data sheet Rev. 5.1 — 18 May 2021

2 / 24

NX3 L246? 00mm” % +>e % DEED NX3L2467 D D E j E D E0 g a a E j g g E j E 3 EDGE E j E 3 Transparent [up mew

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

5 Functional diagram

001aak174

1Y0

1Y1

2Y0

2Y1

3Y0

3Y1

4Y0

4Y1

Figure 1. Logic symbol

001aak175

1Y1

1Y0

2Y1

2Y0

Figure 2. Logic diagram

6 Pinning information

6.1 Pinning

NX3L2467

1Y1 VCC

1Z 4Y0

1Y0 4Z

1S 4Y1

2Y1 2S

2Z 3Y0

2Y0 3Z

GND 3Y1

001aak177

Figure 3. Pin configuration SOT403-1 (TSSOP16)

1Y0

2Y1

NX3L2467

4Y1

3Y0

2Y0

GND

3Y1

001aak176

Transparent top view

terminal 1

index area

Figure 4. Pin configuration SOT1039-2 (HXQFN16)

Product data sheet Rev. 5.1 — 18 May 2021

3 / 24

NX3L2467

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

NX3L2467

terminal 1

index area

001aam031

Transparent top view

83Z

73Y1

6GND

52Y0

013

115

4Z12

4Y111

2S10

3Y09

11Y0

21S

32Y1

42Z

Figure 5. Pin configuration SOT1161-1 (XQFN16)

6.2 Pin description

PinSymbol

SOT1039-2 and SOT1161-1 SOT403-1

Description

1Y0, 2Y0, 3Y0, 4Y0 1, 5, 9, 13 3, 7, 11, 15 independent input or output

1S, 2S 2, 10 4, 12 select input

1Y1, 2Y1, 3Y1, 4Y1 15, 3, 7, 11 1, 5, 9, 13 independent input or output

1Z, 2Z, 3Z, 4Z 16, 4, 8, 12 2, 6, 10, 14 common output or input

GND 6 8 ground (0 V)

VCC 14 16 supply voltage

Table 3. Pin description

7 Functional description

Input nS Channel on

L nY0

H nY1

Table 4. Function table[1]

[1] H = HIGH voltage level; L = LOW voltage level.

8 Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

VCC supply voltage -0.5 +4.6 V

VIinput voltage select input nS [1] -0.5 +4.6 V

VSW switch voltage [2] -0.5 VCC + 0.5 V

Table 5. Limiting values

Product data sheet Rev. 5.1 — 18 May 2021

4 / 24

NX3L2467

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol Parameter Conditions Min Max Unit

IIK input clamping current VI < -0.5 V -50 - mA

ISK switch clamping current VI < -0.5 V or VI > VCC + 0.5 V - ±50 mA

VSW > -0.5 V or VSW < VCC + 0.5 V; source or

sink current

- ±350 mAISW switch current

VSW > -0.5 V or VSW < VCC + 0.5 V; pulsed at 1

ms duration, < 10 % duty cycle; peak current

- ±500 mA

Tstg storage temperature -65 +150 °C

Tamb = -40 °C to +125 °C

TSSOP16 [3] - 500 mW

HXQFN16 [4] - 250 mW

Ptot total power dissipation

XQFN16 [5] - 250 mW

Table 5. Limiting values...continued

[1] The minimum input voltage rating may be exceeded if the input current rating is observed.

[2] The minimum and maximum switch voltage ratings may be exceeded if the switch clamping current rating is observed but may not exceed 4.6 V.

[3] For TSSOP16 package: above 60 °C the value of Ptot derates linearly with 5.5 mW/K above.

[4] For HXQFN16 package: above 135 °C the value of Ptot derates linearly with 16.9 mW/K.

[5] For XQFN16 package: above 133 °C the value of Ptot derates linearly with 14.5 mW/K.

9 Recommended operating conditions

Symbol Parameter Conditions Min Max Unit

VCC supply voltage 1.4 4.3 V

VIinput voltage select input nS 0 4.3 V

VSW switch voltage [1] 0 VCC V

Tamb ambient temperature -40 +125 °C

Δt/ΔV input transition rise and fall rate VCC = 1.4 V to 4.3 V [2] - 200 ns/V

Table 6. Recommended operating conditions

[1] To avoid sinking GND current from terminal nZ when switch current flows in terminal nYn, the voltage drop across the bidirectional switch must not exceed

0.4 V. If the switch current flows into terminal nZ, no GND current will flow from terminal nYn. In this case, there is no limit for the voltage drop across the

switch.

[2] Applies to control signal levels.

Product data sheet Rev. 5.1 — 18 May 2021

5 / 24

NX3L2467 nYD and Figure 6

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

10 Static characteristics

At recommended operating conditions; voltages are referenced to GND (ground 0 V).

Tamb = 25 °C Tamb = -40 °C to +125 °CSymbol Parameter Conditions

Min Typ Max Min Max

(85 °C)

Max

(125 °C)

Unit

VCC = 1.4 V to 1.6 V 0.9 - - 0.9 - - V

VCC = 1.65 V to 1.95 V 0.9 - - 0.9 - - V

VCC = 2.3 V to 2.7 V 1.1 - - 1.1 - - V

VCC = 2.7 V to 3.6 V 1.3 - - 1.3 - - V

VIH HIGH-level input

voltage

VCC = 3.6 V to 4.3 V 1.4 - - 1.4 - - V

VCC = 1.4 V to 1.6 V - - 0.3 - 0.3 0.3 V

VCC = 1.65 V to 1.95 V - - 0.4 - 0.4 0.3 V

VCC = 2.3 V to 2.7 V - - 0.4 - 0.4 0.4 V

VCC = 2.7 V to 3.6 V - - 0.5 - 0.5 0.5 V

VIL LOW-level input

voltage

VCC = 3.6 V to 4.3 V - - 0.6 - 0.6 0.6 V

IIinput leakage

current

select input nS; VI = GND to

4.3 V; VCC = 1.4 V to 4.3 V

- - - - ±0.5 ±1 μA

nY0 and nY1 port; see

Figure 6

VCC = 1.4 V to 3.6 V - - ±5 - ±50 ±500 nA

IS(OFF) OFF-state

leakage current

VCC = 3.6 V to 4.3 V - - ±10 - ±50 ±500 nA

nZ port; VCC = 1.4 V to 3.6 V;

see Figure 7

VCC = 1.4 V to 3.6 V - - ±5 - ±50 ±500 nA

IS(ON) ON-state

leakage current

VCC = 3.6 V to 4.3 V - - ±10 - ±50 ±500 nA

VI = VCC or GND; VSW = GND

or VCC

VCC = 3.6 V - - 100 - 500 5000 nA

ICC supply current

VCC = 4.3 V - - 150 - 800 6000 nA

VSW = GND or VCC

VI = 2.6 V; VCC = 4.3 V - 2.0 4.0 - 7 7 μA

VI = 2.6 V; VCC = 3.6 V - 0.35 0.7 - 1 1 μA

VI = 1.8 V; VCC = 4.3 V - 7.0 10.0 - 15 15 μA

VI = 1.8 V; VCC = 3.6 V - 2.5 4.0 - 5 5 μA

ΔICC additional supply

current

VI = 1.8 V; VCC = 2.5 V - 50 200 - 300 500 nA

CIinput

capacitance

- 1.0 - - - - pF

CS(OFF) OFF-state

capacitance

- 35 - - - - pF

CS(ON) ON-state

capacitance

- 130 - - - - pF

Table 7. Static characteristics

Product data sheet Rev. 5.1 — 18 May 2021

6 / 24

NX3L2467 i ",5," 7 ‘ k, ’77 012388000 ‘ i ",5," 7 K ”i 4’ 012,330”, Fl ure 9 Fi ure15 = GND In Figure 8

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

10.1 Test circuits

012aaa000

nY0

nY1

VCC

GND

switch

VIL

VIH

VIL or VIH

VIVO

VI = 0.3 V or VCC - 0.3 V; VO = VCC - 0.3 V or 0.3 V.

Figure 6. Test circuit for measuring OFF-state leakage current

012aaa001

nY0

nY1

VCC

GND

switch

VIL

VIH

VIL or VIH

VI = 0.3 V or VCC - 0.3 V; VO = VCC - 0.3 V or 0.3 V.

Figure 7. Test circuit for measuring ON-state leakage current

10.2 ON resistance

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 9 to Figure 15.

Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °CSymbol Parameter Conditions

Min Typ [2] Max Min Max

Unit

VI = GND to VCC; ISW = 100 mA;

see Figure 8

VCC = 1.4 V - 1.7 3.7 - 4.1 Ω

VCC = 1.65 V - 1.0 1.6 - 1.7 Ω

VCC = 2.3 V - 0.6 0.8 - 0.9 Ω

VCC = 2.7 V - 0.5 0.75 - 0.9 Ω

RON(peak) ON resistance

(peak)

VCC = 4.3 V - 0.5 0.75 - 0.9 Ω

VI = GND to VCC; ISW = 100 mA [3]

VCC = 1.4 V; VSW = 0.4 V - 0.18 0.3 - 0.3 Ω

VCC = 1.65 V; VSW = 0.5 V - 0.18 0.2 - 0.3 Ω

VCC = 2.3 V; VSW = 0.7 V - 0.07 0.1 - 0.13 Ω

VCC = 2.7 V; VSW = 0.8 V - 0.07 0.1 - 0.13 Ω

ΔRON ON resistance

mismatch

between channels

VCC = 4.3 V; VSW = 0.8 V - 0.07 0.1 - 0.13 Ω

Table 8. ON resistance [1]

Product data sheet Rev. 5.1 — 18 May 2021

7 / 24

NX3 L246? Figure 9 Figure 15 not 912535092

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for graphs see Figure 9 to Figure 15.

Tamb = -40 °C to +85 °C Tamb = -40 °C to +125 °CSymbol Parameter Conditions

Min Typ [2] Max Min Max

Unit

VI = GND to VCC; ISW = 100 mA [4]

VCC = 1.4 V - 1.0 3.3 - 3.6 Ω

VCC = 1.65 V - 0.5 1.2 - 1.3 Ω

VCC = 2.3 V - 0.15 0.3 - 0.35 Ω

VCC = 2.7 V - 0.13 0.3 - 0.35 Ω

RON(flat) ON resistance

(flatness)

VCC = 4.3 V - 0.2 0.4 - 0.45 Ω

Table 8. ON resistance [1]...continued

[1] For NX3L2467PW (TSSOP16 package), all ON resistance values are up to 0.05 Ω higher.

[2] Typical values are measured at Tamb = 25 °C.

[3] Measured at identical VCC, temperature and input voltage.

[4] Flatness is defined as the difference between the maximum and minimum value of ON resistance measured at identical VCC and temperature.

10.3 ON resistance test circuit and graphs

012aaa002

VIISW

switch nS

1 VIL

2 VIH

switch

VSW

GND

VCC

VIL or VIH nY0

nY1

RON = VSW / ISW.

Figure 8. Test circuit for measuring ON resistance

VI (V)

0 54 3 1 2

001aag564

0.8

0.4

1.2

1.6

RON

(Ω)

(1)

(2)

(5) (6)

(4)

(3)

1. VCC = 1.5 V.

2. VCC = 1.8 V.

3. VCC = 2.5 V.

4. VCC = 2.7 V.

5. VCC = 3.3 V.

6. VCC = 4.3 V.

Measured at Tamb = 25 °C.

Figure 9. Typical ON resistance as a function of input

voltage

Product data sheet Rev. 5.1 — 18 May 2021

8 / 24

NX3 L246? 001557555 001557556 001557557 001557558

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

001aag565

VI (V)

0 321

0.8

0.4

1.2

1.6

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 10. ON resistance as a function of input voltage;

VCC = 1.5 V

001aag566

VI (V)

0 321

0.4

0.6

0.2

0.8

1.0

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 11. ON resistance as a function of input voltage;

VCC = 1.8 V

001aag567

VI (V)

0 321

0.4

0.6

0.2

0.8

1.0

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 12. ON resistance as a function of input voltage;

VCC = 2.5 V

001aag568

VI (V)

0 321

0.4

0.6

0.2

0.8

1.0

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 13. ON resistance as a function of input voltage;

VCC = 2.7 V

Product data sheet Rev. 5.1 — 18 May 2021

9 / 24

NX3 L246? 901539559 001331995 ﬁgure 18 n8 [0 n2 0 Figure 16 n8 [0 n2 0 Figure 16

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

VI (V)

0 431 2

001aag569

0.4

0.6

0.2

0.8

1.0

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 14. ON resistance as a function of input voltage;

VCC = 3.3 V

VI (V)

0 542 31

001aaj896

0.4

0.6

0.2

0.8

1.0

RON

(Ω)

(1)

(2)

(3)

(4)

1. Tamb = 125 °C.

2. Tamb = 85 °C.

3. Tamb = 25 °C.

4. Tamb = -40 °C.

Figure 15. ON resistance as a function of input voltage;

VCC = 4.3 V

11 Dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 18.

Tamb = 25 °C Tamb = -40 °C to +125 °CSymbol Parameter Conditions

Min Typ [1] Max Min Max

(85 °C)

Max

(125 °C)

Unit

nS to nZ or nYn; see

Figure 16

VCC = 1.4 V to 1.6 V - 41 90 - 120 120 ns

VCC = 1.65 V to 1.95 V - 30 70 - 80 90 ns

VCC = 2.3 V to 2.7 V - 20 45 - 50 55 ns

VCC = 2.7 V to 3.6 V - 19 40 - 45 50 ns

ten enable time

VCC = 3.6 V to 4.3 V - 19 40 - 45 50 ns

nS to nZ or nYn; see

Figure 16

VCC = 1.4 V to 1.6 V - 24 70 - 80 90 ns

VCC = 1.65 V to 1.95 V - 15 55 - 60 65 ns

VCC = 2.3 V to 2.7 V - 9 25 - 30 35 ns

VCC = 2.7 V to 3.6 V - 8 20 - 25 30 ns

tdis disable time

VCC = 3.6 V to 4.3 V - 8 20 - 25 30 ns

Table 9. Dynamic characteristics

Product data sheet Rev. 5.1 — 18 May 2021

10 / 24

NX3L2467 ﬁgure 18 Figure 17 GND Table 10

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for load circuit see Figure 18.

Tamb = 25 °C Tamb = -40 °C to +125 °CSymbol Parameter Conditions

Min Typ [1] Max Min Max

(85 °C)

Max

(125 °C)

Unit

see Figure 17 [2]

VCC = 1.4 V to 1.6 V - 20 - 9 - - ns

VCC = 1.65 V to 1.95 V - 17 - 7 - - ns

VCC = 2.3 V to 2.7 V - 13 - 4 - - ns

VCC = 2.7 V to 3.6 V - 11 - 3 - - ns

tb-m break-before-make

time

VCC = 3.6 V to 4.3 V - 11 - 2 - - ns

Table 9. Dynamic characteristics...continued

[1] Typical values are measured at Tamb = 25 °C and VCC = 1.5 V, 1.8 V, 2.5 V, 3.3 V and 4.3 V respectively.

[2] Break-before-make guaranteed by design.

11.1 Waveform and test circuits

012aaa003

GND

nS input

nZ output

OFF to HIGH

HIGH to OFF

nZ output

HIGH to OFF

OFF to HIGH

nY1 connected to VEXT

nY0 connected to VEXT

VOH

GND

VOH

GND

ten tdis

ten

tdis

Measurement points are given in Table 10.

Logic level: VOH is typical output voltage level that occurs with the output load.

Figure 16. Enable and disable times

Supply voltage Input Output

VCC VMVX

1.4 V to 4.3 V 0.5VCC 0.9VOH

Table 10. Measurement points

Product data sheet Rev. 5.1 — 18 May 2021

11 / 24

NX3 L246? T

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

012aaa004

GND

VCC

VEXT = 1.5 V

nY0

nY1

VIVVORLCL

a. Test circuit

001aag572

tb-m

0.9VO

0.5VI

b. Input and output measurement points

Figure 17. Test circuit for measuring break-before-make timing

012aaa005

nY0

nY1

RLCL

VCC

GND

VEXT = 1.5 V

switch

VIVVO

Test data is given in Table 11.

Definitions test circuit:

RL = Load resistance.

CL = Load capacitance including jig and probe capacitance.

VEXT = External voltage for measuring switching times.

Figure 18. Test circuit for measuring switching times

Supply voltage Input Load

VCC VItr, tfCLRL

1.4 V to 4.3 V VCC ≤ 2.5 ns 35 pF 50 Ω

Table 11. Test data

Product data sheet Rev. 5.1 — 18 May 2021

12 / 24

NX3L2467 Figure 19 Figure 20 Figure 21 and swuch Figure 22 between 5 Figure 23 ; CL = 0.1 n Figure 24

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

11.2 Additional dynamic characteristics

At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise

specified); tr = tf ≤ 2.5 ns; Tamb = 25 °C.

Symbol Parameter Conditions Min Typ Max Unit

fi = 20 Hz to 20 kHz; RL = 32 Ω; see Figure 19 [1]

VCC = 1.4 V; VI = 1 V (p-p) - 0.15 - %

VCC = 1.65 V; VI = 1.2 V (p-p) - 0.10 - %

VCC = 2.3 V; VI = 1.5 V (p-p) - 0.02 - %

VCC = 2.7 V; VI = 2 V (p-p) - 0.02 - %

THD total harmonic

distortion

VCC = 4.3 V; VI = 2 V (p-p) - 0.02 - %

RL = 50 Ω; see Figure 20 [1]

f(-3dB) -3 dB frequency

response VCC = 1.4 V to 4.3 V - 60 - MHz

fi = 100 kHz; RL = 50 Ω; see Figure 21 [1]

αiso isolation (OFF-state)

VCC = 1.4 V to 4.3 V - -90 - dB

between digital inputs and switch; fi = 1 MHz; CL =

50 pF; RL = 50 Ω; see Figure 22

VCC = 1.4 V to 3.6 V - 0.2 - V

Vct crosstalk voltage

VCC = 3.6 V to 4.3 V - 0.3 - V

between switches; fi = 100 kHz; RL = 50 Ω; see

Figure 23

[1]

Xtalk crosstalk

VCC = 1.4 V to 4.3 V - -90 - dB

fi = 1 MHz; CL = 0.1 nF; RL = 1 MΩ; Vgen = 0 V; Rgen

= 0 Ω; see Figure 24

VCC = 1.5 V - 3 - pC

VCC = 1.8 V - 4 - pC

VCC = 2.5 V - 6 - pC

VCC = 3.3 V - 9 - pC

Qinj charge injection

VCC = 4.3 V - 15 - pC

Table 12. Additional dynamic characteristics

[1] fi is biased at 0.5VCC.

Product data sheet Rev. 5.1 — 18 May 2021

13 / 24

NX3 L246? v 0 5v —_"_5___ 1—‘ —°~s__ i as as v 0 SV 7115,", 14171 ti ’1]: 912355007 0 EV v 0 5V

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

11.3 Test circuits

012aaa006

RLswitch nS

1 VIL

2 VIH

switch

VCC

VIL or VIH

0.5VCC

nY0

nY1

GND

Figure 19. Test circuit for measuring total harmonic distortion

012aaa007

RLswitch nS

1 VIL

2 VIH

switch

VCC

VIL or VIH

0.5VCC

nY0

nY1

GND

Adjust fi voltage to obtain 0 dBm level at output. Increase fi frequency until dB meter reads -3 dB.

Figure 20. Test circuit for measuring the frequency response when channel is in ON-state

012aaa008

RLRLswitch nS

1 VIH

2 VIL

switch

VCC

VIL or VIH

0.5VCC 0.5VCC

nY0

nY1

GND

Adjust fi voltage to obtain 0 dBm level at input.

Figure 21. Test circuit for measuring isolation (OFF-state)

Product data sheet Rev. 5.1 — 18 May 2021

14 / 24

NX3 L246?

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

012aaa009

switch

2 VIH

VIL

nY0

nY1

VCC

VIVO

logic

input

0.5VCC

RLCL

0.5VCC

switch

a. Test circuit

Vct

onoff

logic

input (nS) off

012aaa010

b. Input and output pulse definitions

Figure 22. Test circuit for measuring crosstalk voltage between digital inputs and switch

001aak178

0.5VCC

nZ or nY0

VO1

CHANNEL

OFF

0.5VCC

nZ or nY0nY0 or nZ

VO2

50 Ω

nY0 or nZ

VIL

50 Ωfi

20 log10 (VO2 / VO1) or 20 log10 (VO1 / VO2).

Figure 23. Test circuit for measuring crosstalk between switches

Product data sheet Rev. 5.1 — 18 May 2021

15 / 24

NX3 L246? 012533012

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

012aaa011

nY0

nY1

VICL

VCC

GND

Rgen

Vgen

switch

a. Test circuit

012aaa012

ΔVO

offonoff

logic

input

(nS)

b. Input and output pulse definitions

Definition: Qinj = ΔVO × CL.

ΔVO = output voltage variation.

Rgen = generator resistance.

Vgen = generator voltage.

Figure 24. Test circuit for measuring charge injection

Product data sheet Rev. 5.1 — 18 May 2021

16 / 24

NX3 L246? HXQFNIE (U) plasma therma‘ enhanced extreme‘y (hm quad na« package. nu iagﬂ M :v @® 0 § 0 CA‘E‘ m m m L a 1 2 x_‘_‘_‘_‘_A_‘_‘_‘_‘4 scale max as our. 31 195 31 can E© 44—43—39

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

12 Package outline

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

- - -

sot1039-2_po

11-03-30

17-10-31

Unit

max

nom

min

0.5 0.05

0.00

0.127

3.1

3.0

2.9

1.95

1.85

1.75

3.1

3.0

2.9

0.5 1.5

0.40

0.35

0.30

0.1

Dimensions

HXQFN16 (U): plastic thermal enhanced extremely thin quad flat package; no

leads; 16 terminals; body 3 x 3 x 0.5 mm SOT1039-2

A1b

0.35

0.30

0.25

c D DhE Eh

1.95

1.85

1.75

e e1e2

1.5

L v

0.1

0.05

0 1 2 mm

scale

terminal 1

index area

B A

detail X

1/2 e

AC Bv

terminal 1

index area Dh

5 8

16 13

SOT1039-2 - - -

Figure 25. Package outline SOT1039-2 (HXQFN16)

Product data sheet Rev. 5.1 — 18 May 2021

17 / 24

NX3 L2467 TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 ll ‘ ‘Li J/E-l “iiiHHHiHHHF i W —% 1 0/} L:;‘ + $ i’;ei MW H H} a

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

UNIT A

1 A

2 A

3 b

p c D

(1) E (2) (1)

e H

E L L

p Q Z y w v θ

REFERENCES

OUTLINE

VERSION

EUROPEAN

PROJECTION ISSUE DATE

IEC JEDEC JEITA

mm 0.15

0.05

0.95

0.80

0.30

0.19

0.2

0.1

5.1

4.9

4.5

4.3 0.65 6.6

6.2

0.4

0.3

0.40

0.06

0.13 0.1 0.2 1

DIMENSIONS (mm are the original dimensions)

Notes

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.

0.75

0.50

SOT403-1 MO-153 99-12-27

03-02-18

w M

0.25

1 8

16 9

detail X

(A )

v M A

0 2.5 5 mm

scale

TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1

max.

1.1

pin 1 index

Figure 26. Package outline SOT403-1 (TSSOP16)

Product data sheet Rev. 5.1 — 18 May 2021

18 / 24

NX3 L2467 xorms: plastic, extremely thin quad flat package; no leads; l l vii L:|:|—Eﬁ JED » e MCAlBl FD ‘ [“ H e (M) W low HUM i l l‘l l rag Mlle . a l " ﬁ' 3 ‘ Ev fili+i|ii P D ,7, j l E 7 / HWH H n J L D I 2 Ef© W

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

References

Outline

version

European

projection Issue date

IEC JEDEC JEITA

SOT1161-1 - - -

- - -

sot1161-1_po

09-12-28

09-12-29

Unit(1)

max

nom

min

0.5 0.05

0.00

0.25

0.20

0.15

1.9

1.8

1.7

2.7

2.6

2.5

0.4 1.2

0.45

0.40

0.35

0.1

Dimensions

Note

1. Plastic or metal protrusions of 0.075 mm maximum per side are not included.

XQFN16: plastic, extremely thin quad flat package; no leads;

16 terminals; body 1.80 x 2.60 x 0.50 mm SOT1161-1

A1A3

0.127

b D E e e1

1.2

e2L L1

0.55

0.50

0.45

v w

0.05

0 1 2 mm

scale

B A

terminal 1

index area

detail X

AA1

terminal 1

index area

AC Bv

5 8

16 13

Figure 27. Package outline SOT1161-1 (XQFN16)

Product data sheet Rev. 5.1 — 18 May 2021

19 / 24

NX3L2467 Secuon 4 "Ordering information“

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

13 Abbreviations

Acronym Description

CDM Charged Device Model

CMOS Complementary Metal-Oxide Semiconductor

ESD ElectroStatic Discharge

HBM Human Body Model

MM Machine Model

PDA Personal Digital Assistant

Table 13. Abbreviations

14 Revision history

Document ID Release date Data sheet status Change notice Supersedes

NX3L2467 v.5.1 20210518 Product data sheet - NX3L2467 v.5

Modifications: •Updated Section 4 "Ordering information"

NX3L2467 v.5 20120702 Product data sheet - NX3L2467 v.4

NX3L2467 v.4 20111108 Product data sheet - NX3L2467 v.3

NX3L2467 v.3 20101229 Product data sheet - NX3L2467 v.2

NX3L2467 v.2 20100519 Product data sheet - NX3L2467 v.1

NX3L2467 v.1 20090623 Product data sheet - -

Table 14. Revision history

Product data sheet Rev. 5.1 — 18 May 2021

20 / 24

NX3L2467 me mis document w My llwwwnxg cam

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

15 Legal information

15.1 Data sheet status

Document status[1][2] Product status[3] Definition

Objective [short] data sheet Development This document contains data from the objective specification for product

development.

Preliminary [short] data sheet Qualification This document contains data from the preliminary specification.

Product [short] data sheet Production This document contains the product specification.

[1] Please consult the most recently issued document before initiating or completing a design.

[2] The term 'short data sheet' is explained in section "Definitions".

[3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple

devices. The latest product status information is available on the Internet at URL http://www.nxp.com.

15.2 Definitions

Draft — A draft status on a document indicates that the content is still

under internal review and subject to formal approval, which may result

in modifications or additions. NXP Semiconductors does not give any

representations or warranties as to the accuracy or completeness of

information included in a draft version of a document and shall have no

liability for the consequences of use of such information.

Short data sheet — A short data sheet is an extract from a full data sheet

with the same product type number(s) and title. A short data sheet is

intended for quick reference only and should not be relied upon to contain

detailed and full information. For detailed and full information see the

relevant full data sheet, which is available on request via the local NXP

Semiconductors sales office. In case of any inconsistency or conflict with the

short data sheet, the full data sheet shall prevail.

Product specification — The information and data provided in a Product

data sheet shall define the specification of the product as agreed between

NXP Semiconductors and its customer, unless NXP Semiconductors and

customer have explicitly agreed otherwise in writing. In no event however,

shall an agreement be valid in which the NXP Semiconductors product

is deemed to offer functions and qualities beyond those described in the

Product data sheet.

15.3 Disclaimers

Limited warranty and liability — Information in this document is believed

to be accurate and reliable. However, NXP Semiconductors does not

give any representations or warranties, expressed or implied, as to the

accuracy or completeness of such information and shall have no liability

for the consequences of use of such information. NXP Semiconductors

takes no responsibility for the content in this document if provided by an

information source outside of NXP Semiconductors. In no event shall NXP

Semiconductors be liable for any indirect, incidental, punitive, special or

consequential damages (including - without limitation - lost profits, lost

savings, business interruption, costs related to the removal or replacement

of any products or rework charges) whether or not such damages are based

on tort (including negligence), warranty, breach of contract or any other

legal theory. Notwithstanding any damages that customer might incur for

any reason whatsoever, NXP Semiconductors’ aggregate and cumulative

liability towards customer for the products described herein shall be limited

in accordance with the Terms and conditions of commercial sale of NXP

Semiconductors.

Right to make changes — NXP Semiconductors reserves the right to

make changes to information published in this document, including without

limitation specifications and product descriptions, at any time and without

notice. This document supersedes and replaces all information supplied prior

to the publication hereof.

Suitability for use — NXP Semiconductors products are not designed,

authorized or warranted to be suitable for use in life support, life-critical or

safety-critical systems or equipment, nor in applications where failure or

malfunction of an NXP Semiconductors product can reasonably be expected

to result in personal injury, death or severe property or environmental

damage. NXP Semiconductors and its suppliers accept no liability for

inclusion and/or use of NXP Semiconductors products in such equipment or

applications and therefore such inclusion and/or use is at the customer’s own

risk.

Applications — Applications that are described herein for any of these

products are for illustrative purposes only. NXP Semiconductors makes

no representation or warranty that such applications will be suitable

for the specified use without further testing or modification. Customers

are responsible for the design and operation of their applications and

products using NXP Semiconductors products, and NXP Semiconductors

accepts no liability for any assistance with applications or customer product

design. It is customer’s sole responsibility to determine whether the NXP

Semiconductors product is suitable and fit for the customer’s applications

and products planned, as well as for the planned application and use of

customer’s third party customer(s). Customers should provide appropriate

design and operating safeguards to minimize the risks associated with

their applications and products. NXP Semiconductors does not accept any

liability related to any default, damage, costs or problem which is based

on any weakness or default in the customer’s applications or products, or

the application or use by customer’s third party customer(s). Customer is

responsible for doing all necessary testing for the customer’s applications

and products using NXP Semiconductors products in order to avoid a

default of the applications and the products or of the application or use by

customer’s third party customer(s). NXP does not accept any liability in this

respect.

Limiting values — Stress above one or more limiting values (as defined in

the Absolute Maximum Ratings System of IEC 60134) will cause permanent

damage to the device. Limiting values are stress ratings only and (proper)

operation of the device at these or any other conditions above those

given in the Recommended operating conditions section (if present) or the

Characteristics sections of this document is not warranted. Constant or

repeated exposure to limiting values will permanently and irreversibly affect

the quality and reliability of the device.

Terms and conditions of commercial sale — NXP Semiconductors

products are sold subject to the general terms and conditions of commercial

sale, as published at http://www.nxp.com/profile/terms, unless otherwise

agreed in a valid written individual agreement. In case an individual

agreement is concluded only the terms and conditions of the respective

agreement shall apply. NXP Semiconductors hereby expressly objects to

applying the customer’s general terms and conditions with regard to the

purchase of NXP Semiconductors products by customer.

Product data sheet Rev. 5.1 — 18 May 2021

21 / 24

NX3L2467

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

No offer to sell or license — Nothing in this document may be interpreted

or construed as an offer to sell products that is open for acceptance or

the grant, conveyance or implication of any license under any copyrights,

patents or other industrial or intellectual property rights.

Quick reference data — The Quick reference data is an extract of the

product data given in the Limiting values and Characteristics sections of this

document, and as such is not complete, exhaustive or legally binding.

Export control — This document as well as the item(s) described herein

may be subject to export control regulations. Export might require a prior

authorization from competent authorities.

Non-automotive qualified products — Unless this data sheet expressly

states that this specific NXP Semiconductors product is automotive qualified,

the product is not suitable for automotive use. It is neither qualified nor

tested in accordance with automotive testing or application requirements.

NXP Semiconductors accepts no liability for inclusion and/or use of non-

automotive qualified products in automotive equipment or applications. In

the event that customer uses the product for design-in and use in automotive

applications to automotive specifications and standards, customer (a) shall

use the product without NXP Semiconductors’ warranty of the product for

such automotive applications, use and specifications, and (b) whenever

customer uses the product for automotive applications beyond NXP

Semiconductors’ specifications such use shall be solely at customer’s own

risk, and (c) customer fully indemnifies NXP Semiconductors for any liability,

damages or failed product claims resulting from customer design and use

of the product for automotive applications beyond NXP Semiconductors’

standard warranty and NXP Semiconductors’ product specifications.

Translations — A non-English (translated) version of a document is for

reference only. The English version shall prevail in case of any discrepancy

between the translated and English versions.

Security — Customer understands that all NXP products may be subject

to unidentified or documented vulnerabilities. Customer is responsible

for the design and operation of its applications and products throughout

their lifecycles to reduce the effect of these vulnerabilities on customer’s

applications and products. Customer’s responsibility also extends to other

open and/or proprietary technologies supported by NXP products for use

in customer’s applications. NXP accepts no liability for any vulnerability.

Customer should regularly check security updates from NXP and follow up

appropriately. Customer shall select products with security features that best

meet rules, regulations, and standards of the intended application and make

the ultimate design decisions regarding its products and is solely responsible

for compliance with all legal, regulatory, and security related requirements

concerning its products, regardless of any information or support that may

be provided by NXP. NXP has a Product Security Incident Response Team

(PSIRT) (reachable at PSIRT@nxp.com) that manages the investigation,

reporting, and solution release to security vulnerabilities of NXP products.

15.4 Trademarks

Notice: All referenced brands, product names, service names and

trademarks are the property of their respective owners.

NXP — wordmark and logo are trademarks of NXP B.V.

Product data sheet Rev. 5.1 — 18 May 2021

22 / 24

NX3L2467

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

Tables

Tab. 1. Ordering information ..........................................2

Tab. 2. Ordering options ................................................2

Tab. 3. Pin description ...................................................4

Tab. 4. Function table ....................................................4

Tab. 5. Limiting values .................................................. 4

Tab. 6. Recommended operating conditions ................. 5

Tab. 7. Static characteristics ......................................... 6

Tab. 8. ON resistance ................................................... 7

Tab. 9. Dynamic characteristics .................................. 10

Tab. 10. Measurement points ........................................11

Tab. 11. Test data ..........................................................12

Tab. 12. Additional dynamic characteristics .................. 13

Tab. 13. Abbreviations ...................................................20

Tab. 14. Revision history ...............................................20

Figures

Fig. 1. Logic symbol ..................................................... 3

Fig. 2. Logic diagram ....................................................3

Fig. 3. Pin configuration SOT403-1 (TSSOP16) ...........3

Fig. 4. Pin configuration SOT1039-2 (HXQFN16) ........ 3

Fig. 5. Pin configuration SOT1161-1 (XQFN16) ........... 4

Fig. 6. Test circuit for measuring OFF-state

leakage current ................................................. 7

Fig. 7. Test circuit for measuring ON-state leakage

current ............................................................... 7

Fig. 8. Test circuit for measuring ON resistance ...........8

Fig. 9. Typical ON resistance as a function of input

voltage ............................................................... 8

Fig. 10. ON resistance as a function of input

voltage; VCC = 1.5 V ........................................9

Fig. 11. ON resistance as a function of input

voltage; VCC = 1.8 V ........................................9

Fig. 12. ON resistance as a function of input

voltage; VCC = 2.5 V ........................................9

Fig. 13. ON resistance as a function of input

voltage; VCC = 2.7 V ........................................9

Fig. 14. ON resistance as a function of input

voltage; VCC = 3.3 V ...................................... 10

Fig. 15. ON resistance as a function of input

voltage; VCC = 4.3 V ...................................... 10

Fig. 16. Enable and disable times ................................11

Fig. 17. Test circuit for measuring break-before-

make timing .....................................................12

Fig. 18. Test circuit for measuring switching times ....... 12

Fig. 19. Test circuit for measuring total harmonic

distortion .......................................................... 14

Fig. 20. Test circuit for measuring the frequency

response when channel is in ON-state ............14

Fig. 21. Test circuit for measuring isolation (OFF-

state) ................................................................14

Fig. 22. Test circuit for measuring crosstalk voltage

between digital inputs and switch ....................15

Fig. 23. Test circuit for measuring crosstalk

between switches ............................................15

Fig. 24. Test circuit for measuring charge injection .......16

Fig. 25. Package outline SOT1039-2 (HXQFN16) ........17

Fig. 26. Package outline SOT403-1 (TSSOP16) ..........18

Fig. 27. Package outline SOT1161-1 (XQFN16) .......... 19

Product data sheet Rev. 5.1 — 18 May 2021

23 / 24

NX3 L246?

NXP Semiconductors NX3L2467

Dual low-ohmic double-pole double-throw analog switch

Contents

1 General description ............................................ 1

2 Features and benefits .........................................1

3 Applications .........................................................2

4 Ordering information .......................................... 2

4.1 Ordering options ................................................ 2

5 Functional diagram ............................................. 3

6 Pinning information ............................................ 3

6.1 Pinning ...............................................................3

6.2 Pin description ................................................... 4

7 Functional description ........................................4

8 Limiting values .................................................... 4

9 Recommended operating conditions ................ 5

10 Static characteristics .......................................... 6

10.1 Test circuits ........................................................7

10.2 ON resistance ....................................................7

10.3 ON resistance test circuit and graphs ................8

11 Dynamic characteristics ...................................10

11.1 Waveform and test circuits .............................. 11

11.2 Additional dynamic characteristics ...................13

11.3 Test circuits ......................................................14

12 Package outline .................................................17

13 Abbreviations .................................................... 20

14 Revision history ................................................ 20

15 Legal information .............................................. 21

Please be aware that important notices concerning this document and the product(s)

described herein, have been included in section 'Legal information'.

For more information, please visit: http://www.nxp.com

For sales office addresses, please send an email to: salesaddresses@nxp.com

Date of release: 18 May 2021

Document identifier: NX3L2467

Datenblatt für NX3L2467 von NXP USA Inc.

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