Scheda tecnica MJD200, MJD210 di onsemi

0N Semicondueior® www.0nsemi.com Dnfl
© Semiconductor Components Industries, LLC, 2013
October, 2019 − Rev. 14
1Publication Order Number:
MJD200/D
Complementary Plastic
Power Transistors
NPN/PNP Silicon DPAK For Surface
Mount Applications
MJD200 (NPN),
MJD210 (PNP)
Designed for low voltage, low−power, high−gain audio
amplifier applications.
Features
•High DC Current Gain
•Lead Formed for Surface Mount Applications in Plastic Sleeves
(No Suffix)
•Low Collector−Emitter Saturation Voltage
•High Current−Gain − Bandwidth Product
•Annular Construction for Low Leakage
•Epoxy Meets UL 94 V−0 @ 0.125 in
•NJV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q101
Qualified and PPAP Capable
•These Devices are Pb−Free and are RoHS Compliant
MAXIMUM RATINGS
Rating Symbol Max Unit
Collector−Base Voltage VCB 40 Vdc
Collector−Emitter Voltage VCEO 25 Vdc
Emitter−Base Voltage VEB 8.0 Vdc
Collector Current − Continuous IC5.0 Adc
Collector Current − Peak ICM 10 Adc
Base Current IB1.0 Adc
Total Power Dissipation
@ TC = 25°C
Derate above 25°C
PD12.5
0.1
W
W/°C
Total Power Dissipation (Note 1)
@ TA = 25°C
Derate above 25°C
PD1.4
0.011
W
W/°C
Operating and Storage Junction
Temperature Range
TJ, Tstg −65 to +150 °C
ESD − Human Body Model HBM 3B V
ESD − Machine Model MM C V
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. These ratings are applicable when surface mounted on the minimum pad
sizes recommended.
THERMAL CHARACTERISTICS
Characteristic Symbol Max Unit
Thermal Resistance, Junction−to−Case RqJC 10 °C/W
Thermal Resistance, Junction−to−Ambient (Note 2) RqJA 89.3 °C/W
2. These ratings are applicable when surface mounted on the minimum pad sizes recommended.
SILICON
POWER TRANSISTORS
5 AMPERES
25 VOLTS, 12.5 WATTS
DPAK
CASE 369C
STYLE 1
MARKING DIAGRAM
A = Assembly Location
Y = Year
WW = Work Week
x = 1 or 0
G=Pb−Free Package
AYWW
J2x0G
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
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1
BASE
3
EMITTER
COLLECTOR
2,4
12
3
4
1
BASE
3
EMITTER
COLLECTOR
2,4
PNP NPN
MJD200 (NPN), MJD210 (PNP) ELECTRICAL CHARACTERISTICS (Tc : 2530 unieSS oiherwlse nciedi CharacIerIsIIc ‘ Symbol ‘ M OFF CHARACTERISTICS CoIIecIoI—Emmer Suslalmng \IoHage (Note ap VCEOISHS] (IC :10 mm“; IE : m 2 CoIIecIoI CuIeII Current icgo (vCE : 4o vac, IE : o) (Veg : 40 vac, IE : 0, TJ :125’0) EmIiter Cqurr Currenl IEEO (Veg : B we IC : 0) ON CHARACTERISTICS C Current GaIn (Nola a)‘ hFE oo mAdc, VCE : I We) 7 Age, vCE : I We) 4 Adc, vCE : 2 We) 1 CoIIecIoI—Emmer SaIuIaIIon Voltage (Note up vcHsa.) (IC , 500 mAdc, IE : so mAdc) 200 mAdc) I Adc) Base-Emma Saturallcn VeIIage INoIe a) VEEM (IC : 5 Adc, IE : I Adc) Base-Emma On VoIIage (Mom 3) VBHW (IC : 2 Adc, VCE : I We) DYNAMIC CHARACTERISTICS Cunem—Gam — Banawmh ProducI INoIe 4) H (IC :100 mAdc, vCE : Io we i‘eS‘ : Io MHz) 5 Oulpui Capacitance C0b (\/CE :10 vac, IE : o, r : n.I MHz) MJD200 MJDZIOI NJVMJD210T4G a Puise TesI. Pulse Width : see us, My Cycle 1 2%, 4 fT : thE i . neg. TA 2 5 E 2 25 II: g HI v z a 7 E 7 g I 5 5 79V V; 3 1 TA {SURFACE MOUNT; h "S w “5 “-' DUTY CYCLE : 1% E TC : D u 5 A 25 50 75 Ian T. TEMPERATURE 1°C) 125 150 Figure 1. Power Deraling Figure 2. Switching Time Test Cir www.cnsemi.com 2
MJD200 (NPN), MJD210 (PNP)
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2
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic Symbol Min Max Unit
OFF CHARACTERISTICS
Collector−Emitter Sustaining Voltage (Note 3)
(IC = 10 mAdc, IB = 0)
VCEO(sus) 25 −
Vdc
Collector Cutoff Current
(VCB = 40 Vdc, IE = 0)
(VCB = 40 Vdc, IE = 0, TJ = 125°C)
ICBO −
−
100
100
nAdc
mAdc
Emitter Cutoff Current
(VBE = 8 Vdc, IC = 0)
IEBO −100
nAdc
ON CHARACTERISTICS
C Current Gain (Note 3),
(IC = 500 mAdc, VCE = 1 Vdc)
(IC = 2 Adc, VCE = 1 Vdc)
(IC = 5 Adc, VCE = 2 Vdc)
hFE
70
45
10
−
180
−
−
Collector−Emitter Saturation Voltage (Note 3)
(IC = 500 mAdc, IB = 50 mAdc)
(IC = 2 Adc, IB = 200 mAdc)
(IC = 5 Adc, IB = 1 Adc)
VCE(sat)
−
−
−
0.3
0.75
1.8
Vdc
Base−Emitter Saturation Voltage (Note 3)
(IC = 5 Adc, IB = 1 Adc)
VBE(sat) −2.5
Vdc
Base−Emitter On Voltage (Note 3)
(IC = 2 Adc, VCE = 1 Vdc)
VBE(on) −1.6
Vdc
DYNAMIC CHARACTERISTICS
Current−Gain − Bandwidth Product (Note 4)
(IC = 100 mAdc, VCE = 10 Vdc, ftest = 10 MHz)
fT65 −
MHz
Output Capacitance
(VCB = 10 Vdc, IE = 0, f = 0.1 MHz)
MJD200
MJD210, NJVMJD210T4G
Cob
−
−
80
120
pF
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle [ 2%.
4. fT = ⎪hfe⎪• ftest.
25
25
Figure 1. Power Derating
T, TEMPERATURE (°C)
050 75 100 125 150
15
10
TC
5
20
PD, POWER DISSIPATION (WATTS)
Figure 2. Switching Time Test Circuit
2.5
0
1.5
1
TA
0.5
2
+11 V
25 ms
0
-9 V
RB
-4 V
D1
SCOPE
VCC
+30 V
RC
tr, tf ≤ 10 ns
DUTY CYCLE = 1%
51
D1 MUST BE FAST RECOVERY TYPE, e.g.:
1N5825 USED ABOVE IB ≈ 100 mA
MSD6100 USED BELOW IB ≈ 100 mA
TC
TA (SURFACE MOUNT)
RB and RC VARIED TO OBTAIN DESIRED CURRENT LEVELS
FOR PNP TEST CIRCUIT,
REVERSE ALL POLARITIES
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MJD200 (NPN), MJD210 (PNP)
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3
10K
IC, COLLECTOR CURRENT (A)
10
5K
3K
2K
1K
500
300
200
100
50
1K
IC, COLLECTOR CURRENT (A)
VCC = 30 V
IC/IB = 10
TJ = 25°C
t, TIME (ns)
500
300
200
100
50
td
30
20
10
5
1
0.01 0.03 0.05 0.50.2
0.02 0.1 0.3 10
Figure 3. Turn−On Time Figure 4. Turn−Off Time
t, TIME (ns)
3
2
5213
tr
MJD200
MJD210
30
20
0.01 0.03 0.05 0.50.2
0.02 0.1 0.3 105213
VCC = 30 V
IC/IB = 10
IB1 = IB2
TJ = 25°C
ts
tf
MJD200
MJD210
VEHsaA) @ ‘c/‘a: ‘0 Vaasau @ lo ‘a 5§C(0150)C 5°C In IsuCC 5mm 25:0 755%“) 25°C 5C6 to tswc 516 to 150°C
MJD200 (NPN), MJD210 (PNP)
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4
IC, COLLECTOR CURRENT (A)
IC, COLLECTOR CURRENT (A)IC, COLLECTOR CURRENT (A)
hFE, DC CURRENT GAIN
Figure 5. DC Current Gain
Figure 6. “On” Voltage
IC, COLLECTOR CURRENT (A)
200
400
0.07 0.1 0.3 50.05
100
80
60
40
0.2
IC, COLLECTOR CURRENT (A)
Figure 7. Temperature Coefficients
20 0.7 1 320.5
25°C
TJ = 150°C
-55°C
2
0.05
IC, COLLECTOR CURRENT (A)
5
1.6
1.2
0.8
0.4
0320.07 0.20.1 0.50.3 10.7
TJ = 25°C
V, VOLTAGE (VOLTS)
NPN
MJD200
PNP
MJD210
VCE = 1 V
VCE = 2 V
50.05 3
200
400
100
80
60
40
20
hFE, DC CURRENT GAIN
25°C
TJ = 150°C
-55°C
VCE = 1 V
VCE = 2 V
V, VOLTAGE (VOLTS)
VBE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
VBE @ VCE = 1 V
qVC for VCE(sat)
qVB for VBE
2
0.05
1.6
1.2
0.8
0.4
0
320.07 0.20.1 0.50.3 10.7
TJ = 25°C
VBE(sat) @ IC/IB = 10
VCE(sat) @ IC/IB = 10
VBE @ VCE = 1 V
V, TEMPERATURE COEFFICIENTS (mV/ C)°θ
+2.5
+2
+1.5
+1
0
-0.5
-1
-1.5
-2
+0.5
-2.5
0.07 0.1 0.3 50.05 0.2 0.7 1 320.5
*APPLIES FOR IC/IB ≤ hFE/3
25°C to 150°C
-55°C to 25°C
25°C to 150°C
-55°C to 25°C
V, TEMPERATURE COEFFICIENTS (mV/ C)°θ
+2.5
+2
+1.5
+1
0
-0.5
-1
-1.5
-2
+0.5
-2.5
0.07 0.1 0.3 50.05 0.2 0.7 1 320.5
5
0.07 0.1 0.30.2 0.7 1 20.5
*APPLIES FOR IC/IB ≤ hFE/3
*qVC for VCE(sat)
qVB for VBE
25°C to 150°C
-55°C to 25°C
25°C to 150°C
-55°C to 25°C
MJD200 (NPN), MJD210 (PNP)
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5
t, TIME (ms)
0.01
0.02 0.05 1 2 5 10 20 50 100 2000.1 0.50.2
1
0.2
0.1
0.05
r(t), TRANSIENT THERMAL
RqJC(t) = r(t) qJC
RqJC = 10°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TC = P(pk) qJC(t)
P(pk)
t1
t2
DUTY CYCLE, D = t1/t2
0.2
0 (SINGLE PULSE)
RESISTANCE (NORMALIZED)
Figure 8. Thermal Response
0.5 D = 0.5
0.05
0.3
0.7
0.07
0.03
0.02
0.1
0.02
0.01
10
VCE, COLLECTOR−EMITTER VOLTAGE (V)
0.01 30
2
5
0.1
BONDING WIRE LIMITED
THERMALLY LIMITED @ TC = 25°C
(SINGLE PULSE)
SECOND BREAKDOWN LIMITED
CURVES APPLY BELOW
RATED VCEO
Figure 9. Active Region Safe Operating Area
500ms
dc
1
3
1ms
2010753210.3
100ms
TJ = 150°C
IC, COLLECTOR CURRENT (AMP)
5ms There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate IC − VCE
limits of the transistor that must be observed for reliable
operation; i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 9 is based on TJ(pk) = 150°C; TC is
variable depending on conditions. Second breakdown pulse
limits are valid for duty cycles to 10% provided TJ(pk)
≤ 150°C. TJ(pk) may be calculated from the data in Figure 8.
At high case temperatures, thermal limitations will reduce
the power that can be handled to values less than the
limitations imposed by second breakdown.
200
VR, REVERSE VOLTAGE (V)
20 40
70
100
30
Figure 10. Capacitance
50
201064210.4
C, CAPACITANCE (pF)
0.6
TJ = 25°C
MJD200 (NPN)
MJD210 (PNP)
Cob
Cib
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MJD200 (NPN), MJD210 (PNP)
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6
ORDERING INFORMATION
Device Package Type Shipping
†
MJD200G DPAK
(Pb−Free)
75 Units / Rail
MJD200RLG DPAK
(Pb−Free)
1,800 / Tape & Reel
MJD200T4G DPAK
(Pb−Free)
2,500 / Tape & Reel
MJD210G DPAK
(Pb−Free)
75 Units / Rail
MJD210RLG DPAK
(Pb−Free)
1,800 / Tape & Reel
MJD210T4G DPAK
(Pb−Free)
2,500 / Tape & Reel
NJVMJD210T4G* DPAK
(Pb−Free)
2,500 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*NJV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q101 Qualified and PPAP
Capable
DPAK (SINGLE GAUGE)
CASE 369C
ISSUE F
DATE 21 JUL 2015
SCALE 1:1
STYLE 1:
PIN 1. BASE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
STYLE 3:
PIN 1. ANODE
2. CATHODE
3. ANODE
4. CATHODE
STYLE 4:
PIN 1. CATHODE
2. ANODE
3. GATE
4. ANODE
STYLE 5:
PIN 1. GATE
2. ANODE
3. CATHODE
4. ANODE
STYLE 6:
PIN 1. MT1
2. MT2
3. GATE
4. MT2
STYLE 7:
PIN 1. GATE
2. COLLECTOR
3. EMITTER
4. COLLECTOR
12
3
4
STYLE 8:
PIN 1. N/C
2. CATHODE
3. ANODE
4. CATHODE
STYLE 9:
PIN 1. ANODE
2. CATHODE
3. RESISTOR ADJUST
4. CATHODE
STYLE 10:
PIN 1. CATHODE
2. ANODE
3. CATHODE
4. ANODE
b
D
E
b3
L3
L4
b2
M
0.005 (0.13) C
c2
A
c
C
Z
DIM MIN MAX MIN MAX
MILLIMETERSINCHES
D0.235 0.245 5.97 6.22
E0.250 0.265 6.35 6.73
A0.086 0.094 2.18 2.38
b0.025 0.035 0.63 0.89
c2 0.018 0.024 0.46 0.61
b2 0.028 0.045 0.72 1.14
c0.018 0.024 0.46 0.61
e0.090 BSC 2.29 BSC
b3 0.180 0.215 4.57 5.46
L4 −−− 0.040 −−− 1.01
L0.055 0.070 1.40 1.78
L3 0.035 0.050 0.89 1.27
Z0.155 −−− 3.93 −−−
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DI-
MENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
7. OPTIONAL MOLD FEATURE.
12 3
4
XXXXXX = Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
AYWW
XXX
XXXXXG
XXXXXXG
ALYWW
DiscreteIC
5.80
0.228
2.58
0.102
1.60
0.063
6.20
0.244
3.00
0.118
6.17
0.243
ǒmm
inchesǓ
SCALE 3:1
GENERIC
MARKING DIAGRAM*
*This information is generic. Please refer
to device data sheet for actual part
marking.
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
H0.370 0.410 9.40 10.41
A1 0.000 0.005 0.00 0.13
L1 0.114 REF 2.90 REF
L2 0.020 BSC 0.51 BSC
A1
H
DETAIL A
SEATING
PLANE
A
B
C
L1
L
H
L2 GAUGE
PLANE
DETAIL A
ROTATED 90 CW5
e
BOTTOM VIEW
Z
BOTTOM VIEW
SIDE VIEW
TOP VIEW
ALTERNATE
CONSTRUCTIONS
NOTE 7
Z
MECHANICAL CASE OUTLINE
PACKAGE DIMENSIONS
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DPAK (SINGLE GAUGE)
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1
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