Scheda tecnica LM34914 di Texas Instruments

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FB
SW
LM34914
BST
VCC
ISEN
RON/SD
VIN
C1
SHUT
DOWN
SS
RTN SGND
RON
C5
8V - 40V
Input
C3
C4
L1
D1 R1 R3
R2
C2
VOUT
LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
LM34914 Ultra Small 1.25A Step-Down Switching Regulator with Intelligent Current Limit
Check for Samples: LM34914
1FEATURES DESCRIPTION
The LM34914 Step-Down Switching Regulator
2• Input Voltage Range: 8V to 40V features all the functions needed to implement a low
• Integrated N-Channel Buck Switch cost, efficient, buck bias regulator capable of
• Valley Current Limit Varies with VIN and VOUT supplying at least 1.25A to the load. To reduce
to Reduce Excessive Inductor Current excessive switch current due to the possibility of a
saturating inductor the valley current limit threshold
• On-time is Reduced when in Current Limit changes with input and output voltages, and the on-
• Integrated Start-Up Regulator time is reduced when current limit is detected. This
• No Loop Compensation Required buck regulator contains a 44V N-Channel Buck
Switch, and is available in the thermally enhanced 3
• Ultra-Fast Transient Response mm x 3 mm WSON-10 package. The feedback
• Maximum Switching Frequency: 1.3 MHz regulation scheme requires no loop compensation,
• Operating Frequency Remains Nearly results in fast load transient response, and simplifies
Constant with Load Current and Input Voltage circuit implementation. The operating frequency
Variations remains constant with line and load variations due to
the inverse relationship between the input voltage
• Programmable Soft-Start and the on-time. The valley current limit results in a
• Precision Internal Reference smooth transition from constant voltage to constant
• Adjustable Output Voltage current mode when current limit is detected, reducing
the frequency and output voltage, without the use of
• Thermal Shutdown foldback. Additional features include: VCC under-
voltage lock-out, thermal shutdown, gate drive under-
TYPICAL APPLICATIONS voltage lock-out, and maximum duty cycle limit.
• High Efficiency Point-Of-Load (POL) Regulator Package
• Non-Isolated Buck Regulator • WSON-10 (3 mm x 3mm)
• Secondary High Voltage Post Regulator • Exposed Thermal Pad For Improved Heat
Dissipation
Basic Step Down Regulator
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Copyright © 2006–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
l TEXAS INSTRUMENTS
SW
BST
RTN
VCC
FB
SS
VIN 10
9
8
7
6
5
4
3
2
1
RON/SD
SGND
ISEN
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
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Connection Diagram
10-Lead WSON
PIN DESCRIPTIONS
Pin Number Name Description Application Information
Internally connected to the buck switch source. Connect to
1 SW Switching Node the inductor, diode, and bootstrap capacitor.
Connect a 0.022 µF capacitor from SW to this pin. The
2 BST Boost pin for bootstrap capacitor capacitor is charged each off-time via an internal diode.
The re-circulating current flows out of this pin to the free-
3 ISEN Current sense wheeling diode.
Re-circulating current flows into this pin to the current sense
4 SGND Sense Ground resistor.
Ground for all internal circuitry other than the current limit
5 RTN Circuit Ground detection.
Feedback input from the regulated Internally connected to the regulation and over-voltage
6 FB output comparators. The regulation level is 2.5V.
An internal current source charges an external capacitor to
7 SS Softstart 2.5V, providing the softstart function.
An external resistor from VIN to this pin sets the buck switch
8 RON/SD On-time control and shutdown on-time. Grounding this pin shuts down the regulator.
Nominally regulated at 7.0V. Connect a 0.1 µF capacitor from
this pin to RTN. An external voltage (8V to 14V) can be
9 VCC Output from the startup regulator applied to this pin to reduce internal dissipation. An internal
diode connects VCC to VIN.
10 VIN Input supply voltage Operating input range is 8.0V to 40V.
Exposed metal pad on the underside of the device. It is
EP Exposed Pad recommended to connect this pad to the PC board ground
plane to aid in heat dissipation.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
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LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
Absolute Maximum Ratings(1)(2)
VIN to RTN 44V
BST to RTN 52V
SW to RTN (Steady State) -1.5V
BST to VCC 44V
VIN to SW 44V
BST to SW 14V
VCC to RTN 14V
SGND to RTN -0.3V to +0.3V
Current out of ISEN See text
SS to RTN -0.3V to 4V
All Other Inputs to RTN -0.3 to 7V
ESD Rating(3) Human Body Model 2kV
Storage Temperature Range -65°C to +150°C
JunctionTemperature 150°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The human body model is a 100pF capacitor discharged through a 1.5kΩresistor into each pin.
Operating Ratings(1)
VIN Voltage 8.0V to 40V
Junction Temperature −40°C to + 125°C
(1) Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which
operation of the device is intended to be functional. For specifications and test conditions, see Electrical Characteristics.
Electrical Characteristics
Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless otherwise stated the
following conditions apply: VIN = 12V, RON = 200kΩ(1)(2).
Symbol Parameter Conditions Min Typ Max Units
Start-Up Regulator, VCC
VCCReg VCC regulated output Vin > 9V 6.6 7.0 7.4 V
ICC = 0 mA,
VIN-VCC dropout voltage 1.3 V
VCC = UVLOVCC + 250 mV
VCC output impedance VIN = 8V 155 Ω
(0 mA ≤ICC ≤5 mA) VIN = 40V 0.16
VCC current limit(3) VCC = 0V 11 mA
UVLOVCC VCC under-voltage lockout VCC increasing 5.7 V
threshold
UVLOVCC hysteresis VCC decreasing 150 mV
UVLOVCC filter delay 100 mV overdrive 3 µs
IIN operating current Non-switching, FB = 3V 0.57 0.85 mA
IIN shutdown current RON/SD = 0V 80 160 µA
(1) For detailed information on soldering plastic WSON packages, visit www.ti.com/packaging.
(2) Typical specifications represent the most likely parametric norm at 25°C operation.
(3) VCC provides self bias for the internal gate drive and control circuits. Device thermal limitations limit external loading
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Electrical Characteristics (continued)
Limits in standard type are for TJ= 25°C only; limits in boldface type apply over the junction temperature (TJ) range of -40°C
to +125°C. Minimum and Maximum limits are specified through test, design, or statistical correlation. Typical values represent
the most likely parametric norm at TJ= 25°C, and are provided for reference purposes only. Unless otherwise stated the
following conditions apply: VIN = 12V, RON = 200kΩ(1)(2).
Symbol Parameter Conditions Min Typ Max Units
Switch Characteristics
Rds(on) Buck Switch Rds(on) ITEST = 200 mA 0.33 0.7 Ω
UVLOGD Gate Drive UVLO VBST - VSW Increasing 3.0 4.2 5.5 V
UVLOGD hysteresis 470 mV
Softstart Pin
VSS Pull-up voltage 2.5 V
ISS Internal current source 12.5 µA
Current Limit
ILIM VIN = 8V, VFB = 2.4V 1.0 1.2 1.4
Threshold VIN = 30V, VFB = 2.4V 0.9 1.1 1.3 A
VIN = 30V, VFB = 1.0V 0.85 1.05 1.25
Response time 150 ns
On Timer
tON - 1 On-time (normal operation) VIN = 10V, RON = 200 kΩ2.1 2.8 3.4 µs
tON - 2 On-time (normal operation) VIN = 40V, RON = 200 kΩ655 ns
tON - 3 On-time (current limit) VIN = 10V, RON = 200 kΩ1.13 µs
Shutdown threshold at RON/SD Voltage at RON/SD rising 0.4 0.8 1.2 V
Shutdown Threshold hysteresis Voltage at RON/SD falling 32 mV
Off Timer
tOFF Minimum Off-time 265 ns
Regulation and Over-Voltage Comparators (FB Pin)
VREF FB regulation threshold SS pin = steady state 2.445 2.50 2.550 V
FB over-voltage threshold 2.9 V
FB bias current 15 nA
Thermal Shutdown
TSD Thermal shutdown temperature Junction temperature rising 175 °C
Thermal shutdown hysteresis 20 °C
Thermal Resistance
θJA Junction to Ambient 30 °C/W
0 LFPM Air Flow(4)
θJC Junction to Case(4) 8 °C/W
(4) Value shown assumes a 4-layer PC board and 4 vias to conduct heat from beneath the package.
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l TEXAS INSTRUMENTS \ RON = 45k a\\ \ 0k, \ \ 500K,
0 0.5 1.0 1.5 2.0 2.5
0.9
1.0
1.1
1.2
1.3
VALLEY CURRENT
LIMIT THRESHOLD (A)
VFB (V)
VIN = 8V
15V
24V
34V
40V
0 10 20 30 40
VIN (V)
RON/SD PIN VOLTAGE (V)
0
1.0
2.0
3.0
100k
500k
RON = 45k
02 4 68 10 12
ICC (mA)
0
1
2
3
4
5
6
7
8
VCC (V)
VIN = 9V
VIN = 8V
VIN 10V
t
VCC Externally Loaded
FS = 200 kHZ
0
VIN (V)
0.1
1.0
10
ON-TIME (Ps)
40
10 20 30
0.3
3.0
600k
400k
200k
100k
RON = 45k
6.5 7.0 7.5 8.0 8.5 9.0
5.0
5.5
6.0
6.5
7.0
7.5
VCC (V)
VIN (V)
LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
Typical Performance Characteristics
Unless otherwise specified the following conditions apply: TJ= 25°C
Typical Efficiency Performance VCC vs VIN
Figure 1. Figure 2.
VCC vs ICC ON-Time vs VIN and RON
Figure 3. Figure 4.
Valley Current Limit Threshold
vs. FB and VIN Voltage at the RON/SD Pin
Figure 5. Figure 6.
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0 10 20 30 40
VIN (V)
0
200
400
600
800
INPUT CURRENT (PA)
Shutdown Current
Operating Current
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
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Typical Performance Characteristics (continued)
Unless otherwise specified the following conditions apply: TJ= 25°C
Input Shutdown and Operating Current Into VIN
Figure 7.
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I_mv : 1. _I_
FB SW
RTN
BST
SS
C3
LM34914
SD
+
-
SGND
ISEN
Input
GND
RON/SD
+
-
ON TIMER
LOGIC
FINISH
START
Driver
FB
8V - 40V
2.5V
2.9V
0.8V
C4
L1
D1
R1 R3
R2 C2
C5
C1
C6
RON
CURRENT LIMIT
COMPARATOR
OVER-VOLTAGE
COMPARATOR
REGULATION
COMPARATOR
VIN VCC
VOUT
VIN
VIN
RSENSE
12.5 PA
41 m:
RON
THERMAL
SHUTDOWN
7V START-UP
REGULATOR
LEVEL
SHIFT
Gate Drive
UVLO
VCC
UVLO
CL
Threshold
Adjust
MINIMUM
OFF TIMER
START
FINISH
' Ton
LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
Typical Application Circuit and Block Diagram
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UVLO
VIN
VCC
SW Pin
Inductor
Current
SS Pin
t2
VOUT
7.0V
2.5V
t1
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
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Figure 8. Startup Sequence
Functional Description
The LM34914 Step Down Switching Regulator features all the functions needed to implement a low cost, efficient
buck bias power converter capable of supplying at least 1.25A to the load. This high voltage regulator contains
an N-Channel buck switch, is easy to implement, and is available in the thermally enhanced 3mm x 3mm WSON-
10 package. The regulator’s operation is based on a constant on-time control scheme where the on-time is
determined by VIN. This feature results in the operating frequency remaining relatively constant with load and
input voltage variations. The feedback control scheme requires no loop compensation resulting in very fast load
transient response. The valley current limit scheme protects against excessively high currents if the output is
short circuited when VIN is high. To aid in controlling excessive switch current due to a possible saturating
inductor the valley current limit threshold changes with input and output voltages, and the on-time is reduced by
approximately 50% when current limit is detected.The LM34914 can be applied in numerous applications to
efficiently regulate down higher voltages. Additional features include: Thermal shutdown, VCC under-voltage lock-
out, gate drive under-voltage lock-out, and maximum duty cycle limit.
Control Circuit Overview
The LM34914 buck DC-DC regulator employs a control scheme based on a comparator and a one-shot on-timer,
with the output voltage feedback (FB) compared to an internal reference (2.5V). If the FB voltage is below the
reference the buck switch is switched on for a time period determined by the input voltage and a programming
resistor (RON). Following the on-time the switch remains off until the FB voltage falls below the reference, but not
less than the minimum off-time forced by the LM34914. The buck switch is then turned on for another on-time
period.
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RON = VOUT x (VIN - 1.5)
FS x 1.15 x 10-10 x VIN - 1.4k
tON = (VIN - 1.5)
1.15 x 10-10 x (RON + 1.4k)
+ 50 ns
FS = VOUT2 x L1 x 1.5 x 1020
RL x RON2
DC = tON
tON + tOFF
VOUT
VIN
= tON x FS =
FS = VOUT x (VIN ± 1.5)
1.15 x 10-10 x (RON + 1.4k) x VIN
LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
When in regulation, the LM34914 operates in continuous conduction mode at heavy load currents and
discontinuous conduction mode at light load currents. In continuous conduction mode the inductor’s current is
always greater than zero, and the operating frequency remains relatively constant with load and line variations.
The minimum load current for continuous conduction mode is one-half the inductor’s ripple current amplitude.
The approximate operating frequency is calculated as follows:
(1)
The buck switch duty cycle is equal to:
(2)
In discontinuous conduction mode, where the inductor’s current reaches zero during the off-time forcing a longer-
than-normal off-time, the operating frequency is lower than in continuous conduction mode, and varies with load
current. Conversion efficiency is maintained at light loads since the switching losses decrease with the reduction
in load and frequency. The approximate discontinuous operating frequency can be calculated as follows:
(3)
where RL= the load resistance, and L1 is the circuit’s inductor.
The output voltage is set by the two feedback resistors (R1, R2 in the Block Diagram). The regulated output
voltage is calculated as follows:
VOUT = 2.5 x (R1 + R2) / R2 (4)
Output voltage regulation is based on supplying ripple voltage to the feedback input (FB pin), normally obtained
from the output voltage ripple through the feedback resistors. The LM34914 requires a minimum of 25 mVp-p of
ripple voltage at the FB pin, requiring the ripple voltage at VOUT be higher by the gain factor of the feedback
resistor ratio. The output ripple voltage is created by the inductor’s ripple current passing through R3 which is in
series with the output capacitor. For applications where reduced ripple is required at VOUT, see Applications
Information.
If the voltage at FB rises above 2.9V, due to a transient at VOUT or excessive inductor current which creates
higher than normal ripple at VOUT, the internal over-voltage comparator immediately shuts off the internal buck
switch. The next on-time starts when the voltage FB falls below 2.5V and the inductor current falls below the
current limit threshold.
ON-Time Timer
The on-time for the LM34914 is determined by the RON resistor and the input voltage (VIN), calculated from:
(5)
The inverse relationship with VIN results in a nearly constant frequency as VIN is varied. To set a specific
continuous conduction mode switching frequency (FS), the RON resistor is determined from the following:
(6)
Equation 1,Equation 5, and Equation 6 are valid only during normal operation - i.e., the circuit is not in current
limit. When the LM34914 operates in current limit, the on-time is reduced by approximately 50%. This feature
reduces the peak inductor current which may be excessively high if the load current and the input voltage are
simultaneously high. This feature operates on a cycle-by-cycle basis until the load current is reduced and the
output voltage resumes its normal regulated value.
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STOP
RUN
RON/SD
Input
Voltage
LM34914
VIN
RON
LM34914
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Shutdown
The LM34914 can be remotely shut down by taking the RON/SD pin below 0.8V. See Figure 9. In this mode the
SS pin is internally grounded, the on-timer is disabled, and bias currents are reduced. Releasing the RON/SD pin
allows the circuit to resume operation. The voltage at the RON/SD pin is normally between 1.5V and 3.0V,
depending on VIN and the RON resistor.
Figure 9. Shutdown Implementation
Current Limit
Current limit detection occurs during the off-time by monitoring the recirculating current flowing out of the ISEN
pin. Referring to the Typical Application Circuit and Block Diagram, during the off-time the inductor current flows
through the load, into SGND, through the internal sense resistor, out of ISEN and through D1 to the inductor. If
that current exceeds the current limit threshold the current limit comparator output delays the start of the next on-
time period. The next on-time starts when the current out of ISEN is below the threshold and the voltage at FB
falls below 2.5V. The operating frequency is typically lower due to longer-than-normal off-times.
The valley current limit threshold is a function of the input voltage (VIN) and the output voltage sensed at FB, as
shown in the graph “Valley Current Limit Threshold vs. VFB and VIN”. This feature reduces the inductor current’s
peak value at high line and load. To further reduce the inductor’s peak current, the next cycle’s on-time is
reduced by approximately 50% if the voltage at FB is below its threshold when the inductor current reduces to
the current limit threshold (VOUT is low due to current limiting).
Figure 10 illustrates the inductor current waveform during normal operation and in current limit. During the first
“Normal Operation” the load current is IOUT1, the average of the ripple waveform. As the load resistance is
reduced, the inductor current increases until it exceeds the current limit threshold. During the “Current Limited”
portion of Figure 10, the current limit threshold lowers since the high load current causes VOUT (and the voltage
at FB) to reduce. The on-time is reduced by approximately 50%, resulting in lower ripple amplitude for the
inductor’s current. During this time the LM34914 is in a constant current mode, with an average load current
equal to the current limit threshold + ΔI/2 (IOUT2). Normal operation resumes when the load current is reduced to
IOUT3, allowing VOUT, the current limit threshold, and the on-time to return to their normal values. Note that in the
second period of “Normal Operation”, even though the inductor’s peak current exceeds the current limit threshold
during part of each cycle, the circuit is not in current limit since the current falls below the threshold before the
feedback voltage reduces to its threshold.
The peak current allowed through the buck switch, and the ISEN pin, is 2A, and the maximum allowed average
current is 1.5A.
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l TEXAS INSTRUMENTS H m Decrsxses m
'I
IOUT2
IOUT3
Normal
Operation
Load Current
Decreases
Current
Limited
Load
Current
Increases
Normal
Operation
Current Limit
Threshold
Inductor Current
Feedback
Voltage
@ FB Pin
IOUT1
TON
2.5V
TON
2
LM34914
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SNVS453B –MAY 2006–REVISED MARCH 2013
Figure 10. Inductor Current - Normal and Current Limit Operation
N - Channel Buck Switch and Driver
The LM34914 integrates an N-Channel buck switch and associated floating high voltage gate driver. The gate
driver circuit works in conjunction with an external bootstrap capacitor and an internal high voltage diode. A 0.022
µF capacitor (C4) connected between BST and SW provides the voltage to the driver during the on-time. During
each off-time, the SW pin is at approximately -1V, and C4 is recharged for the next on-time from VCC through the
internal diode. The minimum off-time ensures a minimum time each cycle to recharge the bootstrap capacitor.
Softstart
The softstart feature allows the converter to gradually reach a steady state operating point, thereby reducing
start-up stresses and current surges. Upon turn-on, after VCC reaches the under-voltage threshold, an internal
12.5 µA current source charges up the external capacitor at the SS pin to 2.5V (t2in Figure 8). The ramping
voltage at SS (and the non-inverting input of the regulation comparator) ramps up the output voltage in a
controlled manner.
An internal switch grounds the SS pin if VCC is below the under-voltage lockout threshold, or if the RON/SD pin is
grounded.
Thermal Shutdown
The LM34914 should be operated so the junction temperature does not exceed 125°C. If the junction
temperature increases above that, an internal Thermal Shutdown circuit activates (typically) at 175°C, taking the
controller to a low power reset state by disabling the buck switch and the on-timer. This feature helps prevent
catastrophic failures from accidental device overheating. When the junction temperature reduces below 155°C
(typical hysteresis = 20°C), normal operation resumes.
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R3(min) = 25 mV x (R1 + R2)
R2 x IOR (min)
IOR (min) = VOUT x (VIN (min) - VOUT)
L1 x FS x VIN (min)
L1 = VOUT x (VIN (max) - VOUT)
IOR (max) x FS x VIN (max)
RON t100 ns x (VIN(MAX) ± 1.5V)
1.15 x 10-10 - 1.4 k:
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
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APPLICATIONS INFORMATION
EXTERNAL COMPONENTS
The following guidelines can be used to select the external components (see the Block Diagram). First determine
the following operating parameters:
- Output voltage (VOUT)
- Minimum and maximum input voltage (VIN(min) and VIN(max))
- Minimum and maximum load current (IOUT(min) and IOUT(max))
- Switching Frequency (FS)
R1 and R2: These resistors set the output voltage. The ratio of these resistors is calculated from:
R1/R2 = (VOUT/2.5V) - 1 (7)
R1 and R2 should be chosen from standard value resistors in the range of 1.0 kΩ- 10 kΩwhich satisfy the
above ratio.
RON:The resistor sets the on-time, and consequently, the switching frequency. Its value can be determined using
Equation 6 based on the frequency, or Equation 5 if a specific on-time is required. The minimum allowed value
for RON is calculated from:
(8)
L1: The main parameter affected by the inductor is the output current ripple amplitude (IOR). The minimum load
current is used to determine the maximum allowable ripple. In order to maintain continuous conduction mode the
valley should not reach 0 mA. This is not a requirement of the LM34914, but serves as a guideline for selecting
L1. For this case, the maximum ripple current is:
IOR(MAX) = 2 x IOUT(min) (9)
If the minimum load current is zero, use 20% of IOUT(max) for IOUT(min) in Equation 9. The ripple calculated in
Equation 6 is then used in the following equation:
(10)
where Fs is the switching frequency. This provides a minimum value for L1. The next larger standard value
should be used, and L1 should be rated for the peak current level, equal to IOUT(max) + IOR(max)/2.
C2 and R3: Since the LM34914 requires a minimum of 25 mVp-p of ripple at the FB pin for proper operation, the
required ripple at VOUT is increased by R1 and R2. This necessary ripple is created by the inductor ripple current
flowing through R3, and to a lesser extent by C2 and its ESR. The minimum inductor ripple current is calculated
using Equation 10, rearranged to solve for IOR at minimum VIN.
(11)
The minimum value for R3 is then equal to:
(12)
Typically R3 is less than 5Ω. C2 should generally be no smaller than 3.3 µF, although that is dependent on the
frequency and the desired output characteristics. C2 should be a low ESR good quality ceramic capacitor.
Experimentation is usually necessary to determine the minimum value for C2, as the nature of the load may
require a larger value. A load which creates significant transients requires a larger value for C2 than a non-
varying load.
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C6 = t2 x 12.5 PA
2.5V
C1 = IOUT (max) x tON
'V
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D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may inadvertently affect the IC’s operation through external or internal EMI. The diode
should be rated for the maximum input voltage (VIN(max)), the maximum load current (IOUT(max)), and the peak
current which occurs when the current limit and maximum ripple current are reached simultaneously. The diode’s
average power dissipation is calculated from:
PD1 = VFx IOUT x (1-D) (13)
where VFis the diode's forward voltage drop, and D is the duty cycle.
C1 and C5: C1’s purpose is to supply most of the switch current during the on-time, and limit the voltage ripple
at VIN, on the assumption that the voltage source feeding VIN has an output impedance greater than zero. If the
source’s dynamic impedance is high (effectively a current source), it supplies the average input current, but not
the ripple current.
At maximum load current, when the buck switch turns on, the current into VIN suddenly increases to the lower
peak of the inductor’s ripple current, ramps up to the upper peak, then drop to zero at turn-off. The average
current during the on-time is the load current. For a worst case calculation, C1 must supply this average load
current during the maximum on-time. C1 is calculated from:
(14)
where tON is the maximum on-time, and ΔV is the allowable ripple voltage at VIN. C5’s purpose is to help avoid
transients and ringing due to long lead inductance leading to the VIN pin. A low ESR, 0.1 µF ceramic chip
capacitor is recommended, and must be located close to the VIN and RTN pins.
C3: The capacitor at the VCC output provides not only noise filtering and stability, but also prevents false
triggering of the VCC UVLO at the buck switch on/off transitions. C3 should be no smaller than 0.1 µF, and should
be a good quality, low ESR, ceramic capacitor. C3’s value, and the VCC current limit, determine a portion of the
turn-on-time (t1 in Figure 8).
C4: The recommended value for C4 is 0.022 µF. A high quality ceramic capacitor with low ESR is recommended
as C4 supplies a surge current to charge the buck switch gate at turn-on. A low ESR also helps ensure a
complete recharge during each off-time.
C6: The capacitor at the SS pin determines the softstart time, i.e. the time for the output voltage, to reach its final
value (t2 in Figure 8). The capacitor value is determined from the following:
(15)
PC BOARD LAYOUT
The LM34914 regulation, over-voltage, and current limit comparators are very fast, and respond to short duration
noise pulses. Layout considerations are therefore critical for optimum performance. The layout must be as neat
and compact as possible, and all of the components must be as close as possible to their associated pins. The
current loop formed by D1, L1, C2 and the SGND and ISEN pins should be as small as possible. The ground
connection from SGND and RTN to C1 should be as short and direct as possible.
If it is expected that the internal dissipation of the LM34914 will produce excessive junction temperatures during
normal operation, good use of the PC board’s ground plane can help to dissipate heat. The exposed pad on the
bottom of the IC package can be soldered to a ground plane, and that plane should extend out from beneath the
IC, and be connected to ground plane on the board’s other side with several vias, to help dissipate the heat. The
exposed pad is internally connected to the IC substrate. Additionally the use of wide PC board traces, where
possible, can help conduct heat away from the IC. Judicious positioning of the PC board within the end product,
along with the use of any available air flow (forced or natural convection) can help reduce the junction
temperatures.
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 13
Product Folder Links: LM34914
l TEXAS INSTRUMENTS
SW
FB
LM34914
L1
R1
R2
C2
CB
CA
RA
VOUT
FB
SW
L1
LM34914 Cff R1 R3
R2 C2
VOUT
Cff = tON (max)
(R1//R2)
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
www.ti.com
LOW OUTPUT RIPPLE CONFIGURATIONS
For applications where low output ripple is required, the following options can be used to reduce or nearly
eliminate the ripple.
a) Reduced ripple configuration: In Figure 11, Cff is added across R1 to AC-couple the ripple at VOUT directly
to the FB pin. This allows the ripple at VOUT to be reduced to a minimum of 25 mVp-p by reducing R3, since the
ripple at VOUT is not attenuated by the feedback resistors. The minimum value for Cff is determined from:
(16)
where tON(max) is the maximum on-time, which occurs at VIN(min). The next larger standard value capacitor should
be used for Cff. R1 and R2 should each be towards the upper end of the 1kΩto 10kΩrange.
Figure 11. Reduced Ripple Configuration
b) Minimum ripple configuration: If the application requires a lower value of ripple (<10 mVp-p), the circuit of
Figure 12 can be used. R3 is removed, and the resulting output ripple voltage is determined by the inductor’s
ripple current and C2’s characteristics. RA and CA are chosen to generate a sawtooth waveform at their junction,
and that voltage is AC-coupled to the FB pin via CB. To determine the values for RA, CA and CB, use the
following procedure:
Calculate VA= VOUT - (VSW x (1 - (VOUT/VIN(min)))) (17)
where VSW is the absolute value of the voltage at the SW pin during the off-time (typically 1V). VA is the DC
voltage at the RA/CA junction, and is used in the next equation.
Calculate RA x CA = (VIN(min) - VA) x tON/ΔV (18)
where tON is the maximum on-time (at minimum input voltage), and ΔV is the desired ripple amplitude at the
RA/CA junction (typically 40-50 mV). RA and CA are then chosen from standard value components to satisfy the
above product. Typically CA is 1000 pF to 5000 pF, and RA is 100kΩto 300 kΩ. CB is then chosen large
compared to CA, typically 0.1 µF. R1 and R2 should each be towards the upper end of the 1kΩto 10kΩrange.
Figure 12. Minimum Output Ripple Using Ripple Injection
14 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM34914
l TEXAS INSTRUMENTS \ | l |
FB
SW
L1
R1
LM34914
R2
R3
C2
VOUT
LM34914
www.ti.com
SNVS453B –MAY 2006–REVISED MARCH 2013
c) Alternate minimum ripple configuration: The circuit in Figure 13 is the same as that in the Block Diagram,
except the output voltage is taken from the junction of R3 and C2. The ripple at VOUT is determined by the
inductor’s ripple current and C2’s characteristics. However, R3 slightly degrades the load regulation. This circuit
may be suitable if the load current is fairly constant.
Figure 13. Alternate Minimum Output Ripple
Copyright © 2006–2013, Texas Instruments Incorporated Submit Documentation Feedback 15
Product Folder Links: LM34914
l TEXAS INSTRUMENTS
LM34914
SNVS453B –MAY 2006–REVISED MARCH 2013
www.ti.com
REVISION HISTORY
Changes from Revision A (March 2013) to Revision B Page
• Changed layout of National Data Sheet to TI format .......................................................................................................... 15
16 Submit Documentation Feedback Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: LM34914
I TEXAS INSTRUMENTS Samples
PACKAGE OPTION ADDENDUM
www.ti.com 10-Dec-2020
Addendum-Page 1
PACKAGING INFORMATION
Orderable Device Status
(1)
Package Type Package
Drawing Pins Package
Qty Eco Plan
(2)
Lead finish/
Ball material
(6)
MSL Peak Temp
(3)
Op Temp (°C) Device Marking
(4/5)
Samples
LM34914SD/NOPB ACTIVE WSON DSC 10 1000 RoHS & Green SN Level-1-260C-UNLIM -40 to 125 34914
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
l TEXAS INSTRUMENTS REEL DIMENSIONS TAPE DIMENSIONS ’ I+K0 '«PI» Reel Diame|er AD Dimension deSIgned Io accommodate me componem wIdIh E0 Dimension desIgned Io eeeemmodaIe me component Iengm K0 Dlmenslun desIgned to accommodate me componem Ihlckness 7 w Overall with loe earner cape i p1 Pitch between successwe cavIIy cemers f T Reel Width (W1) QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE O O O D O O D O SprockeIHoles ,,,,,,,,,,, ‘ User Direcllon 0' Feed Pocket Quadrams
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device Package
Type Package
Drawing Pins SPQ Reel
Diameter
(mm)
Reel
Width
W1 (mm)
A0
(mm) B0
(mm) K0
(mm) P1
(mm) W
(mm) Pin1
Quadrant
LM34914SD/NOPB WSON DSC 10 1000 178.0 12.4 3.3 3.3 1.0 8.0 12.0 Q1
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Oct-2021
Pack Materials-Page 1
l TEXAS INSTRUMENTS TAPE AND REEL BOX DIMENSIONS
*All dimensions are nominal
Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)
LM34914SD/NOPB WSON DSC 10 1000 208.0 191.0 35.0
PACKAGE MATERIALS INFORMATION
www.ti.com 21-Oct-2021
Pack Materials-Page 2
DSCOO1 OB y J1 a El J Q 5 \ 6 |:| T ‘ eff, I s i c 3***I** E D D C L},417 Eg,i‘ ‘ T 3 $‘%\HIT®\B©\ '1EXA5
www.ti.com
PACKAGE OUTLINE
C
1.2±0.1
10X 0.3
0.2
10X 0.5
0.4
0.8 MAX
0.05
0.00
2±0.1
2X
2
8X 0.5
A
3.1
2.9
B3.1
2.9
(0.2) TYP
WSON - 0.8 mm max heightDSC0010B
PLASTIC SMALL OUTLINE - NO LEAD
4214926/A 07/2014
PIN 1 INDEX AREA
0.08 SEATING PLANE
(OPTIONAL)
PIN 1 ID
1
6
10
5
0.1 C A B
0.05 C
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance.
0.08
0.1 C A B
0.05 C
SCALE 4.000
DSCOO1 OB
www.ti.com
EXAMPLE BOARD LAYOUT
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
(1.2)
(2)
10X (0.65)
10X (0.25)
(0.35) TYP
(0.75) TYP
(2.75)
() TYP
VIA
0.2
8X (0.5)
WSON - 0.8 mm max heightDSC0010B
PLASTIC SMALL OUTLINE - NO LEAD
4214926/A 07/2014
SYMM
SYMM
LAND PATTERN EXAMPLE
SCALE:20X
1
56
10
NOTES: (continued)
4. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature
number SLUA271 (www.ti.com/lit/slua271).
SOLDER MASK
OPENING
METAL
UNDER
SOLDER MASK
SOLDER MASK
DEFINED
METAL
SOLDER MASK
OPENING
SOLDER MASK DETAILS
NON SOLDER MASK
DEFINED
(PREFERRED)
DSCOO1OB
www.ti.com
EXAMPLE STENCIL DESIGN
(1.13)
(0.89)
10X (0.65)
10X (0.25)
8X (0.5)
(2.75)
(0.55)
WSON - 0.8 mm max heightDSC0010B
PLASTIC SMALL OUTLINE - NO LEAD
4214926/A 07/2014
NOTES: (continued)
5. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
SYMM
SYMM
METAL
TYP
SOLDER PASTE EXAMPLE
BASED ON 0.125 mm THICK STENCIL
EXPOSED PAD
84% PRINTED SOLDER COVERAGE BY AREA
SCALE:25X
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