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DATA SHEET

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August, 2021 − Rev. 3

1Publication Order Number:

FOD3120/D

Gate Drive Optocoupler,

High Noise Immunity,

2.5 A Output Current

FOD3120

Description

The FOD3120 is a 2.5 A Output Current Gate Drive Optocoupler,

capable of driving most medium power IGBT/MOSFET. It is ideally

suited for fast switching driving of power IGBT and MOSFETs used

in motor control inverter applications, and high performance power

system.

It utilizes onsemi’s coplanar packaging technology,

OPTOPLANAR®, and optimized IC design to achieve high noise

immunity, characterized by high common mode rejection.

It consists of a gallium aluminum arsenide (AlGaAs) light emitting

diode optically coupled to an integrated circuit with a high−speed

driver for push−pull MOSFET output stage.

Features

•High Noise Immunity Characterized by 35 kV/ms

Minimum Common Mode Rejection

•2.5 A Peak Output Current Driving Capability

for Most 1200 V/20 A IGBT

•Use of P−Channel MOSFETs at Output Stage Enables Output

Voltage Swing Close to the Supply Rail

•Wide Supply Voltage Range from 15 V to 30 V

•Fast Switching Speed

♦400 ns maximum Propagation Delay

♦100 ns maximum Pulse Width Distortion

•Under Voltage LockOut (UVLO) with Hysteresis

•Extended Industrial Temperate Range,

−40°C to 100°C Temperature Range

•Safety and Regulatory Approvals

♦UL1577, 5000 VRMS for 1 min.

♦DIN EN/IEC60747−5−5

•RDS(ON) of 1 W (typ.) Offers Lower Power Dissipation

•>8.0 mm Clearance and Creepage Distance (Option ‘T’ or ‘TS’)

•1414 V Peak Working Insulation Voltage (VIORM)

•This is a Pb−Free Device

Applications

•Industrial Inverter

•Uninterruptible Power Supply

•Induction Heating

•Isolated IGBT/Power MOSFET Gate Drive

Related Resources

•FOD3150, 1 A Output Current, Gate Drive Optocoupler Datasheet

•https://www.onsemi.com/products/optoelectronics/

ORDERING INFORMATION

See detailed ordering and shipping information in the package

dimensions section on page 14 of this data sheet.

PDIP8 9.655x6.6, 2.54P

CASE 646CQ

PDIP8 GW

CASE 709AC

ANODE

CATHODE

FUNCTIONAL BLOCK DIAGRAM

Note: A 0.1 mF bypass capacitor must be

connected between pins 5 and 8.

PDIP8 GW

CASE 709AD

PDIP8 6.6x3.81, 2.54P

CASE 646BW

MARKING DIAGRAM

3120 = Device Number

V = DIN_EN/IEC60747−5−5 Option (only

appears on component ordered with this option)

XX = Two Digit Year Code

YY = Two Digit Work Week

B = Assembly Package Code

3120

VXXYYB

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Table 1. TRUTH TABLE

LED VDD – VSS “Positive Going” (Turn−on) VDD – VSS “Negative Going” (Turn−off) VO

Off 0 V to 30 V 0 V to 30 V Low

On 0 V to 11.5 V 0 V to 10 V Low

On 11.5 V to 13.5 V 10 V to 12 V Transition

On 13.5 V to 30 V 12 V to 30 V High

Table 2. PIN DEFINITIONS

Pin # Name Description

1 NC Not Connected

2 Anode LED Anode

3 Cathode LED Cathode

4 NC Not Connected

5VSS Negative Supply Voltage

6VO2 Output Voltage 2 (internally connected to VO1)

7VO1 Output Voltage 1

8VDD Positive Supply Voltage

Table 3. SAFETY AND INSULATION RATINGS

As per DIN EN/IEC 60747−5−5. This optocoupler is suitable for “safe electrical insulation” only within the safety limit data.

Compliance with the safety ratings shall be ensured by means of protective circuits.

Symbol Parameter Min. Typ. Max. Unit

Installation Classifications per DIN VDE

0110/1.89 Table 1, For Rated Mains Voltage

< 150 VRMS I–IV

< 300 VRMS I–IV

< 450 VRMS I–III

< 600 VRMS I–III

< 1000 VRMS

(Option T, TS)

I–III

Climatic Classification 40/100/21

Pollution Degree (DIN VDE 0110/1.89) 2

CTI Comparative Tracking Index 175

VPR Input to Output Test Voltage, Method A, VIORM x 1.6 = VPR,

Type and Sample Test with tm = 10 s, Partial Discharge < 5 pC

2262 Vpeak

Input to Output Test Voltage, Method B, VIORM x 1.875 = VPR,

100% Production Test with tm = 1 s, Partial Discharge < 5 pC

2651 Vpeak

VIORM Maximum Working Insulation Voltage 1414 Vpeak

VIOTM Highest Allowable Over Voltage 6000 Vpeak

External Creepage 8.0 mm

External Clearance 7.4 mm

External Clearance (for Option T or TS, 0.4” Lead Spacing) 10.16 mm

DTI Distance Through Insulation (Insulation Thickness) 0.5 mm

TSCase Temperature (Note 1) 175 °C

IS,INPUT Input Current (Note 1) 400 mA

PS,OUTPUT Output Power (Duty Factor ≤ 2.7 %) (Note 1) 700 mW

RIO Insulation Resistance at TS, VIO = 500 V (Note 1) 109W

1. Safety limit value − maximum values allowed in the event of a failure.

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Table 4. ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise specified.)

Symbol Parameter Value Units

TSTG Storage Temperature −55 to +125 °C

TOPR Operating Temperature −40 to +100 °C

TJJunction Temperature −40 to +125 °C

TSOL Lead Wave Solder Temperature

(refer to page 13 for reflow solder profile)

260 for 10 s °C

IF(AVG) Average Input Current 25 mA

IF(Peak) Peak Transient Forward Current (Note 2) 1 A

fOperating Frequency (Note 3) 50 kHz

VRReverse Input Voltage 5 V

IO(PEAK) Peak Output Current (Note 4) 3.0 A

VDD – VSS Supply Voltage 0 to 35 V

TA ≥ 90°C0 to 30

VO(PEAK) Peak Output Voltage 0 to VDD V

tR(IN), tF(IN) Input Signal Rise and Fall Time 500 ns

PDIInput Power Dissipation (Note 5, Note 7) 45 mW

PDOOutput Power Dissipation (Note 6, Note 7) 250 mW

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality

should not be assumed, damage may occur and reliability may be affected.

2. Pulse Width, PW ≤ 1 ms, 300 pps

3. Exponential Waveform, IO(PEAK) ≤ ⎮2.5 A⎮ (≤0.3 ms)

4. Maximum pulse width = 10 ms, maximum duty cycle = 1.1%

5. Derate linearly above 87°C, free air temperature at a rate of 0.77 mW/°C

6. No derating required across temperature range.

7. Functional operation under these conditions is not implied. Permanent damage may occur if the device is subjected to conditions outside

these ratings.

Table 5. RECOMMENDED OPERATING CONDITIONS

Symbol Parameter Value Units

TAAmbient Operating Temperature −40 to +100 °C

VDD – VSS Power Supply 15 to 30 V

IF(ON) Input Current (ON) 7 to 16 mA

VF(OFF) Input Voltage (OFF) 0 to 0.8 V

Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond

the Recommended Operating Ranges limits may affect device reliability.

Table 6. ISOLATION CHARACTERISTICS

Apply over all recommended conditions, typical value is measured at TA = 25°C

Symbol Parameter Conditions Min. Typ. Max. Units

VISO Input−Output Isolation Voltage TA = 25°C, R.H.< 50 %, t = 1.0 min.,

II−O ≤ 10 mA, 50 Hz (Note 8, Note 9)

5000 VRMS

RISO Isolation Resistance VI−O = 500 V (Note 8) 1011 W

CISO Isolation Capacitance VI−O = 0 V, Frequency = 1.0 MHz (Note 8) 1 pF

8. Device is considered a two terminal device: pins 2 and 3 are shorted together and pins 5, 6, 7 and 8 are shorted together.

9. 5000 VRMS for 1 minute duration is equivalent to 6000 VACRMS for 1 second duration.

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Table 7. ELECTRICAL CHARACTERISTICS

Apply over all recommended conditions, typical value is measured at VDD = 30 V, VSS = Ground, TA = 25°C unless otherwise specified.

Symbol Parameter Conditions Min. Typ. Max. Units

VFInput Forward Voltage IF = 10 mA 1.2 1.5 1.8 V

D(VF/TA)Temperature Coefficient

of Forward Voltage

−1.8 mV/°C

BVRInput Reverse Breakdown

Voltage

IR = 10 mA5 V

CIN Input Capacitance f = 1 MHz, VF = 0 V 60 pF

IOH High Level Output Current

(Note 3)

VO = VDD – 3 V −1.0 −2.0 −2.5 A

VO = VDD – 6 V −2.0 −2.5

IOL Low Level Output Current

(Note 3)

VO = VSS + 3 V 1.0 2.0 2.5 A

VO = VSS + 6 V 2.0 2.5

VOH High Level Output Voltage IF = 10 mA, IO = −2.5 A VDD – 6.25 V VDD – 2.5 V V

IF = 10 mA, IO = −100 mA VDD – 0.25 V VDD – 0.1 V

VOL Low Level Output Voltage IF = 0 mA, IO = 2.5 A VSS + 2.5 V VSS + 6.25 V V

IF = 0 mA, IO = 100 mA VSS + 0.1 V VSS + 0.25 V

IDDH High Level Supply Current VO = Open, IF = 7 to 16 mA 2.8 3.8 mA

IDDL Low Level Supply Current VO = Open, VF = 0 to 0.8 V 2.8 3.8 mA

IFLH Threshold Input Current Low to

High

IO = 0 mA, VO > 5 V 2.3 5.0 mA

VFHL Threshold Input Voltage High to

Low

IO = 0 mA, VO < 5 V 0.8 V

VUVLO+ Under Voltage Lockout

Threshold

IF = 10mA, VO > 5 V 11.5 12.7 13.5 V

VUVLO−IF = 10 mA, VO < 5 V 10.0 11.2 12.0 V

UVLOHYS Under Voltage Lockout

Threshold Hysteresis

1.5 V

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

Table 8. SWITCHING CHARACTERISTICS

Apply over all recommended conditions, typical value is measured at VDD = 30 V, VSS = Ground, TA = 25°C unless otherwise specified.

Symbol Parameter Conditions Min. Typ. Max. Units

tPHL Propagation Delay Time to Logic Low Output IF = 7 mA to 16 mA,

Rg = 10 W, Cg = 10 nF,

f = 10 kHz, Duty Cycle = 50 %

150 275 400 ns

tPLH Propagation Delay Time to Logic High Output 150 255 400 ns

PWD Pulse Width Distortion, | tPHL – tPLH | 20 100 ns

PDD

(Skew)

Propagation Delay Difference Between Any

Two Parts or Channels, (tPHL – tPLH) (Note 10)

−250 250 ns

tROutput Rise Time (10% – 90%) 60 ns

tFOutput Fall Time (90% – 10%) 60 ns

tUVLO ON UVLO Turn On Delay IF = 10 mA , VO > 5 V 1.6 ms

tUVLO OFF UVLO Turn Off Delay IF = 10 mA , VO < 5 V 0.4 ms

| CMH |Common Mode Transient Immunity at Output

High

TA = 25°C, VDD = 30 V,

IF = 7 to 16 mA, VCM = 2000 V

(Note 11)

35 50 kV/ms

| CML |Common Mode Transient Immunity at Output

Low

TA = 25°C, VDD = 30 V, VF = 0 V,

VCM = 2000 V (Note 12)

35 50 kV/ms

10.The difference between tPHL and tPLH between any two FOD3120 parts under same test conditions.

11. Common mode transient immunity at output high is the maximum tolerable negative dVcm/dt on the trailing edge of the common mode

impulse signal, Vcm, to assure that the output will remain high (i.e., VO > 15.0 V).

12.Common mode transient immunity at output low is the maximum tolerable positive dVcm/dt on the leading edge of the common pulse signal,

Vcm, to assure that the output will remain low (i.e., VO < 1.0 V).

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TYPICAL PERFORMANCE CHARACTERISTICS

−3.0

−2.5

−2.0

−1.5

−1.0

−0.5

0.0

0.5

0.0 0.5 1.0 1.5 2.0 2.5

IOH, OUTPUT HIGH CURRENT (A)

(VOH − VDD), OUTPUT HIGH VOLTAGE

DROP (V)

Figure 1. Output High Voltage Drop vs. Output

High Current

f = 250 Hz

Duty Cycle = 0.1%

IF = 7 mA to 16 mA

VDD = 15 V to 30 V

VSS = 0 V

TA = −40°C

TA = 25°C

TA = 100°C

−0.30

−0.25

−0.20

−0.15

−0.10

−0.05

0.00

−40 −20 0 20 40 60 80 100

TA, AMBIENT TEMPERATURE (°C)

(VOH − VDD), HIGH OUTPUT VOLTAGE

DROP (V)

VDD = 15 V to 30 V

VSS = 0 V

IF = 7 mA to 16 mA

IO = −100 mA

Figure 2. Output High Voltage Drop vs. Ambient

Temperature

−40 −20 0 20 40 60 80 100

TA, AMBIENT TEMPERATURE (°C)

IOH, OUTPUT HIGH CURRENT (A)

f = 200 Hz

Duty Cycle = 0.2%

IF = 7 mA to 16 mA

Rg = 5 W to GND VDD = 30 V

VDD = 15 V

Figure 3. Output High Current vs. Ambient

Temperature

−40 −20 0 20 40 60 80 10

f = 100 Hz

Duty Cycle = 0.5%

IF = 7 mA to 16 mA

Rg = 10 W to GND

VDD = 30 V

VDD = 15 V

IOH, OUTPUT HIGH CURRENT (A)

TA, AMBIENT TEMPERATURE (°C)

Figure 4. Output High Current vs. Ambient

Temperature

0.0 0.5 1.0 1.5 2.0 2.5

f = 250 Hz

Duty Cycle = 99.9%

VF(OFF) = −3.0 V to 0.8 V

VDD = 15 V to 30 V

VSS = 0 V TA = 25°C

TA = 100°C

TA = −40°C

IOL, OUTPUT LOW CURRENT (A)

VOL, OUTPUT LOW VOLTAGE (V)

Figure 5. Output Low Voltage vs. Output

Low Current

0.00

0.05

0.10

0.15

0.20

0.25

−40 −20 0 20 40 60 80 10

VDD = 15 V to 30 V

VSS = 0 V

IF(OFF) = −3 V to 0.8 V

IO = 100 mA

VOL, OUTPUT LOW VOLTAGE (V)

TA, AMBIENT TEMPERATURE (°C)

Figure 6. Output Low Voltage vs. Ambient

Temperature

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Figure 7. Output Low Current vs. Ambient

Temperature

Figure 8. Output Low Current vs. Ambient

Temperature

Figure 9. Supply Current vs. Ambient

Temperature

Figure 10. Supply Current vs. Supply

Voltage

Figure 11. Low to High Input Current Threshold

vs. Ambient Temperature

Figure 12. Propagation Delay vs. Supply

Voltage

−40 −20 0 20 40 60 80 100

f = 200 Hz

Duty Cycle = 99.8%

IF = 7 mA to 16 mA

Rg = 5 W to VDD VDD = 30 V

VDD = 15 V

IOL OUTPUT LOW CURRENT (A)

TA, AMBIENT TEMPERATURE (°C)

−40 −20 0 20 40 60 80 100

f = 100 Hz

Duty Cycle = 99.5%

IF = 7 mA to 16 mA

Rg = 10 W to VDD

VDD = 30 V

VDD = 15 V

IOL OUTPUT LOW CURRENT (A)

TA, AMBIENT TEMPERATURE (°C)

2.2

2.4

2.6

2.8

3.0

3.2

3.4

3.6

−40 −20 0 20 40 60 80 100

VDD = 30 V

VSS = 0 V

IF = 0 mA (for IDDL)

IF = 10 mA (for IDDH)

IDDH

IDDL

TA, AMBIENT TEMPERATURE (°C)

IDD, SUPPLY CURRENT (mA)

2.0

2.4

2.8

3.2

3.6

15 20 25 30

IF = 10 mA (for IDDH)

IF = 0 mA (for IDDL)

VSS = 0 V, TA = 25°C

IDDH

IDDL

V, SUPPLY VOLTAGE (V)

IDD, SUPPLY CURRENT (mA)

1.0

1.5

2.0

2.5

3.0

3.5

4.0

−40 −20 0 20 40 60 80 100

VDD = 15 V to 30 V

VSS = 0 V

Output = Open

TA, AMBIENT TEMPERATURE (°C)

IFLH, LOW TO HIGH CURRENT

THRESHOLD (mA)

100

150

200

250

300

350

400

15 18 21 24 27 30

IF = 10 mA

TA = 25°C

Rg = 10 W, Cg = 10 nF

Duty Cycle = 50%

f = 10 kHz tPHL

tPLH

VDD, SUPPLY VOLTAGE (V)

, PROPAGATION DELAY (ns)

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Figure 13. Propagation Delay vs. LED Forward

Current

Figure 14. Propagation Delay vs. Ambient

Temperature

Figure 15. Propagation Delay vs. Series Load

Resistance

Figure 16. Propagation Delay vs. Load

Capacitance

Figure 17. Transfer Characteristics Figure 18. Input Forward Current vs. Forward

Voltage

100

200

300

400

500

6 8 10 12 14 16

VDD = 30 V, VSS = 0 V

TA = 25°C

Rg = 10 W, Cg = 10 nF

Duty Cycle = 50%

f = 10 kHz

tPHL

tPLH

, PROPAGATION DELAY (ns)

, FORWARD LED CURRENT (mA)

100

200

300

400

500

−40 −20 0 20 40 60 80 100

IF = 10 mA

VDD = 30 V, VSS = 0 V

Rg = 10 W, Cg = 10 nF

Duty Cycle = 50%

f = 10 kHz

tPHL

tPLH

TA, AMBIENT TEMPERATURE (°C)

, PROPAGATION DELAY (ns)

100

200

300

400

500

010 20304050

IF = 10 mA

VDD = 30 V, VSS = 0 V

Cg = 10 nF, TA = 25°C

Duty Cycle = 50%

f = 10 kHz

tPHL

tPLH

, PROPAGATION DELAY (ns)

Rg, SERIES LOAD RESISTANCE (W)

100

200

300

400

500

0 20 40 60 80 100

IF = 10 mA

VDD = 30 V, VSS = 0 V

Rg = 10 W, TA = 25°C

Duty Cycle = 50%

f = 10 kHz

tPHL

tPLH

, PROPAGATION DELAY (ns)

Cg, LOAD CAPACITANCE (nF)

012 345

TA = 25°C

VDD = 30 V

VO, OUTPUT VOLTAGE (V)

, FORWARD LED CURRENT (mA)

0.001

0.01

0.1

100

0.6 0.8 1.0 1.2 1.4 1.6 1.8

, FORWARD VOLTAGE (V)

, FORWARD CURRENT (mA)

TA = 25°C

TA = 100°C

TA = −40°C

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TYPICAL PERFORMANCE CHARACTERISTICS (continued)

Figure 19. Under Voltage Lockout

VO, OUTPUT VOLTAGE (V)

(VDD − VSS), SUPPLY VOLTAGE (V)

5101520

(12.75, 12.80)

(11.25, 11.30)

(11.20, 0.00) (12.70, 0.00)

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TEST CIRCUIT

Figure 20. IOL Test Circuit

Power Supply

VDD = 15 V to 30 V

Power Supply

V = 6 V

PW = 4.99 ms

Period = 5 ms

ROUT = 50 W

100 W

Frequency = 200 Hz

Duty Cycle = 99.8 %

VDD

F(OFF) = −3.0 V to 0.8 V

0.1 mF

Pulse−In

LED−IFmon

Pulse Generator

Test Conditions:

To Scope

VOL

100 W

47 mF

0.1 mF

D1 C4

47 mF

Iol

= 15 V to 30 V

= 0 VV

Figure 21. IOH Test Circuit

PW = 10 ms

Period = 5 ms

ROUT = 50 W

100 W

Frequency = 200 Hz

Duty Cycle = 0.2 %

VDD

F = 7 mA to 16 mA

0.1 mF

Pulse−In

LED−IFmon

Pulse Generator

Test Conditions:

Power Supply

VDD = 15 V to 30 V

–

Power Supply

V = 6 V

To Scope

VOH

100 W

47 mF

0.1 mF

Current

Probe

Ioh C4

47 mF

= 15 V to 30 V

= 0 VV

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Figure 22. VOH Test Circuit

IF = 7 to 16 mA

0.1 mF

100 mA

VDD = 15 to 30 V

–

Figure 23. VOL Test Circuit

0.1 mF

100 mA

VDD = 15 to 30 V

–

Figure 24. IDDH Test Circuit

IF = 7 to 16 mA

0.1 mF

VDD = 30 V

–

Figure 25. IDDL Test Circuit

VF = −0.3 to 0.8 V

0.1 mF

VDD = 30 V

–

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Figure 26. IFLH Test Circuit

VO > 5 V

0.1 mF

VDD = 15 to 30 V

–

Figure 27. VFHL Test Circuit

VF = −0.3 to 0.8 V

0.1 mF

VDD = 15 to 30 V

–

Figure 28. UVLO Test Circuit

VO = 5 V

0.1 mF

15 V or 30 V

VDD Ramp

–

IF = 10 mA

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Figure 29. tPHL, tPLH, tR and tF Test Circuit and Waveforms

Probe

F = 10 kHz

DC = 50 %

VOUT

tPLH

Cg = 10 nF

Rg = 10 W

50 W

0.1 mF

VDD = 15 to 30 V

–

trtf

90 %

50 %

10 %

tPHL

Figure 30. CMR Test Circuit and Waveforms

0.1 mF

VDD = 30V

VCM = 2,000 V

–

5 V +

–

VCM

Switch at A: IF = 10 mA

Switch at B: IF = 0 mA

VOH

VOVOL

0 V

+ –

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REFLOW PROFILE

Figure 31. Reflow Profile

Time (seconds)

Temperature (_C)

Time 25°C to Peak

Tsmax

Tsmin

120

Preheat Area

240 360

100

120

140

160

180

200

220

240

260

Max. Ramp−up Rate = 3°C/S

Max. Ramp−down Rate = 6°C/S

Table 9. REFLOW PROFILE

Profile Feature Pb−Free Assembly Profile

Temperature Min. (Tsmin) 150°C

Temperature Max. (Tsmax) 200°C

Time (tS) from (Tsmin to Tsmax) 60−120 s

Ramp−up Rate (tL to tP) 3°C/s max.

Liquidous Temperature (TL) 217°C

Time (tL) Maintained Above (TL)60−150 s

Peak Body Package Temperature 260°C +0°C / −5°C

Time (tP) within 5°C of 260°C30 s

Ramp−down Rate (TP to TL) 6°C/s max.

Time 25°C to Peak Temperature 8 min. max.

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ORDERING INFORMATION

Part Number Package Shipping†

FOD3120 DIP 8−Pin 50 / Tube

FOD3120S SMT 8−Pin (Lead Bend) 50 / Tube

FOD3120SD SMT 8−Pin (Lead Bend) 1000 / Tape & Reel

FOD3120V DIP 8−Pin, DIN EN/IEC60747−5−5 option 50 / Tube

FOD3120SV SMT 8−Pin (Lead Bend), DIN EN/IEC60747−5−5 option 50 / Tube

FOD3120SDV SMT 8−Pin (Lead Bend), DIN EN/IEC60747−5−5 option 1000 / Tape & Reel

FOD3120TV DIP 8−Pin, 0.4” Lead Spacing, DIN EN/IEC60747−5−5 option 50 / Tube

FOD3120TSV SMT 8−Pin, 0.4” Lead Spacing, DIN EN/IEC60747−5−5 option 50 / Tube

FOD3120TSR2V SMT 8−Pin, 0.4” Lead Spacing, DIN EN/IEC60747−5−5 option 700 / Tape & Reel

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D

OPTOPLANAR is a registered trademark of Semiconductor Components Industries, LLC dba “onsemi” or its affiliates and/or subsidiaries in the United States

and/or other countries.

0N Semiwndudw" m 9.40-9.91 EM HI {9’ 6.35-6.86 + 15.0° (MAX) 10.16 (TYP) E III? III? I:I£IiI 0.20-0.40/\ 5.08 (MAX) 3.68-3.94 0.51 (MIN) 1.14-1.78 3.05-3.90 .1. NOTES: A) NO STANDARD APPLIES TO THIS PACKAGE E) ALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS. MOLD FLASH, AND TIE EAR EXTRUSION gI 9"“"ﬁ (0.7s) 0.41-0.56 2.54 BSC ON Samaanuaamn and J are Mademavks GI Samanaaaxan Cnmpunenls lndusmes Lu: dha ON Samaanaaaxan ar us saasmanas In the Umled Slates andJm mhev commas ON Samaanaaaxan vesewes me thI In make changes wurmm mnhev nauaa In any prawns nanan ON Semanduc‘m makes m7 wavvamy represenlalmn m guarantee regardmg the suIIahIIIly DI IL; pmducls Iur any pamcuIav purpase nnv dues ON Semumnduclm assume any Mammy ansmg umnI [he apphcahan m use HI any pmduclnv mum and specmcaIIy dIscIaIms any and SH Mammy IncIudmg wmham IImIIa‘mn specIaI cansequenhaI m IncIdenlaI damages ON Sammnaucxar dues nn| aanyay any IIcense under Its paIanI thls mm the ngms av n|hers

PDIP8 6.6x3.81, 2.54P

CASE 646BW

ISSUE O

DATE 31 JUL 2016

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON13445G

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

PDIP8 6.6X3.81, 2.54P

0N Semiwndudw" m 9.40-9.91 4 PH H31 a4 43/ + 6.35-6.86 IaJ as as L44 5 0.20-0.40 5.08 (MAX) 7.62 (TYP) 3.68-3.94 0.51 (MIN) 3.05-3.90 NOTES: A) NO STANDARD APPLIES TO THIS PACKAGE B) ALL DIMENSIONS ARE IN MILLIMETERS. C)D|MENSIONS ARE EXCLUSIVE OF EURRS. MOLD FLASH, AND TIE BAR EXTRUSION -___-_-4 gI | | I | ! ILI 0.41-0.56 ‘_ 2.54 BSC (0.78) ON SemIcunduclm and are lIadEmavks aI SemIcanduclur Cnmpunenls lnduslIIes LLC dba ON SemIcanduclar ar Ils suhsIdIarIes In Ina Unnau sxaxaa andJnI mhev cmm‘nes ON SemIcunduclar vesewes Ina IIgM Ia make changes mnam InnheI nauaa Ia any pruduns heIeIn ON Semenduc‘nv makes m7 wananIy represenlalmn m guarantee regardmg Ina suItahIIIh/ nI IVS manuals Inr any paﬂIcuIav purpase nnv dues ON SemIcnnduclm assume any IIahIII|y avIsIng umnI Ina appIIca‘Ian m use In any pmduclnv cIrcuI| and spEcIIIcaIIy dIscIaIms any and aII IIahIII|y IncIudIng wnnam IInmaIIan specIaI cansequemIaI m IncIdenlaI damages ON SemImnduclar dues nn| aanyay any IIcense under na paIanI ngnua Ivar Ina ngma av n|hers

PDIP8 9.655x6.6, 2.54P

CASE 646CQ

ISSUE O

DATE 18 SEP 2017

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON13446G

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

PDIP8 9.655X6.6, 2.54P

0N Semiwndudw" m 9.40-9.91 (1.75) (2-54) m 4 1 P|N1 * I IA % I’Jh AI ( I I I ' I i ‘° {9 I no. 0 - + 3 Q a no '9. v ‘9 I\ IL?‘ 50 5'? I V 5 5 I . I . I I I I I | I | a (0.76) 5.08 MAX # LAND PATTERN RECOMMENDATION 3.68-3.94 0.51 (MIN) 4 M Jr | 0.20-0.40 I I . . I I I I 0.40 (MIN) 2.54BSC 0.41-0.56 m 8.00 (MIN) NOTES 10.30 (MAX) A) NO STANDARD APPLIES TO THIS PACKAGE BIALL DIMENSIONS ARE IN MILLIMETERS. C) DIMENSIONS ARE EXCLUSIVE OF BURRS. MOLD FLASHI AND TIE BAR EXTRUSION I. I....IIIIIII II II I....IIIII IIIIII. IIIIIII I. II. I. IIIIIIII II .IIIIIIII II III I... III III I. IIIIIIIII I. III. II I... III. IIIII II I) IIIIII. I. .IIIIIIIIII II )III.) II III.. IIIIIIII .I. III.) II I. III.-. .II I) III... I. .IIIIIIIIIII I) III.) III III IIIIIIII II I. I) IIIIIIIII I.....) III.-. I) II II III.) III... IIIIII .I.III.I.I II IIIIIIII IIIII I. .IIIIIIII III III.) I) III III. III. IIIIIIIII.

PDIP8 GW

CASE 709AC

ISSUE O

DATE 31 JUL 2016

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON13447G

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

PDIP8 GW

MECHANICAL CASE OUTLINE PACKAGE DIMENSIONS 0N Semiwndudw" m PDIPBGW CASE709AD ISSUEO DATE 51 JUL2016 1 500 (173) <_ ‘(2541‘="" (1.52;="" 4="" 1="" 1="" 1="" 1="" 1="" 7="" 131.00="" 1="" 1="" 1="" 1="" ,="" (typ)="" 1="" {5="" g="" 8="" a="" '="" o.="" 8="" +="" e="" 2="" e‘="" 19'="" 1="" 1="" 1="" 1="" 1="" 1="" 1="" '="" 5="" a="" 9.40-9.91="" +="" «h="" land="" pattern="" recommendation="" __="" 1.14—1.73="" 7-62(typ)="" 91="" h4="" 3’,="">< o'="" «s="" g="" 8'="" 1="" 1="" i="" :1="" ‘5="" co="" 0'="" 1="" 1="" 1="" 1="" 13="" s="" .1="" iii="" ﬁ+="" 7="" a="" 0.40(min)="" «1="" m="" g="" (bothsides)="" (0-775)="" e="" 10.16="" ln="" ’="" o'="" 12.60(max)="" notes:="" a)="" no="" standard="" applies="" to="" this="" package="" b)="" all="" dimensions="" are="" in="" millimeters.="" c)="" dimensions="" are="" exclusive="" of="" burrs,="" mold="" flash,="" and="" tie="" bar="" extrusion="" on="" semmunduclm="" and="" 1191115="" a1a|11a1a="" a1a="" lvademavks="" uisemmanduclurcnmpunenlslndus|11es="" llc="" dba="" on="" sermcanduclar="" a1="" 11:="" suhs1d1ar1es="" 1n="" [he="" umled="" slales="" andjm="" 12111131="" cmmines="" on="" semcunduclar="" vesewes="" 111a="" 11am="" io="" make="" changes="" w1lhuu|mnhevrm|1celu="" any="" prawns="" na1a1n="" on="" semwnduc‘nv="" makes="" m7="" wavvaniy="" represenlalmn="" av="" guaranlee="" regardmg="" ina="" su1iai7111ly="" a1="" 1l:="" manuals="" 1171="" any="" pamcuiav="" purpase="" nnv="" dues="" on="" semmunduclm="" assume="" any="" 11ai7111|y="" answg="" wi="" a1="" [he="" apphcahan="" n1="" use="" 171="" any="" pmdudnv="" c1rcu1|="" and="" specmcaiiy="" a1sa1a11n5="" any="" and="" a1="" 11ai7111|y="" 1nciud1n§="" w1|hw|11m1iai1un="" spemai="" cansequenhai="" n1="" 1nc1denlai="" damages="" on="" sermmnduclar="" dues="" nn|="" aanyay="" any="" 11cense="" under="" 115="" paiani="" 1151115="" na1="" [he="">

PDIP8 GW

CASE 709AD

ISSUE O

DATE 31 JUL 2016

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries.

ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding

the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically

disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the

rights of others.

98AON13448G

DOCUMENT NUMBER:

DESCRIPTION:

Electronic versions are uncontrolled except when accessed directly from the Document Repository.

Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

PDIP8 GW

‘onseml ‘ and my names. mm m mm; are vegmeved and/or comm" law ummm a! Semen ml owns the "gm: m a number a! panems m wwwomem com sggmmfalen Markmg g: www onsem: com

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