Scheda tecnica NCP7800 Series di onsemi

Commenti/errori della scheda tecnica

0N Semlconduclora

June, 2010 − Rev. 1

1Publication Order Number:

NCP7800/D

NCP7800

1.0 A Positive Voltage

Regulators

The NCP7800 series consists of 3 pin, fixed output, positive linear

voltage regulators, suitable for a wide variety of applications. These

regulators are extremely rugged, incorporating internal current

limiting, thermal shutdown and safe-area compensation. With

adequate heat sinking they can deliver output currents in excess of

1.0 A. Designed as direct replacements for the popular MC7800

family, these products offer enhanced ESD protection.

Features

•Output Current in Excess of 1.0 A

•No External Components Required

•Internal Thermal Overload Protection

•Internal Short Circuit Current Limiting

•Output Transistor Safe−Area Compensation

•Output Voltage Offered in 4% Tolerance

•Available in Standard 3−Lead Transistor Packages

•For Tighter Tolerances and Extended Operating Range Refer to MC7800

•Enhanced ESD Tolerance: HBM 4 kV (5 V and 8 V Options), 3 kV

(12 V and 15 V Options), and MM 400 V

•These are Pb−Free Devices

Figure 1. Application Schematic

A common ground is required between the input and

the output voltages. The input voltage must remain

typically 2.0 V above the output voltage even during the

low point on the input ripple voltage.

NCP78XX

Input

Cin*

0.33 mFCO**

Output

These two digits of the type number indicate

nominal voltage.

Cin is required if regulator is located an appreciable

distance from power supply filter.

CO is not needed for stability; however,

it does improve transient response. Values of less

than 0.1 mF could cause instability.

TO−220−3

T SUFFIX

CASE 221AB

See detailed ordering and shipping information in the package

dimensions section on page 11 of this data sheet.

ORDERING INFORMATION

Heatsink surface

connected to Pin 2

Pin 1. Input

2. Ground

3. Output

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78xxT

AWLYWWG

xx = 05, 08, 12 or 15

A = Assembly Location

WL, L = Wafer Lot

Y = Year

WW = Work Week

G = Pb−Free Device

MARKING

DIAGRAM

PIN CONNECTIONS

50A Carmel Block GND Thelmal Shutdown Block Voltage Relerence Block

NCP7800

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Figure 2. Simplified Block Diagram

Table 1. PIN FUNCTION DESCRIPTION

Pin No. Pin Name Description

1 Vin Positive Power Supply Input.

2 GND Power Supply Ground; Device Substrate.

3 Vout Regulated Output Voltage.

NCP7800

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Table 2. ABSOLUTE MAXIMUM RATINGS (Note 1)

Rating Symbol Value Unit

Input Voltage Range (for Vout: 5.0 − 15 V) Vin −0.3 to 35 V

Power Dissipation PDInternally Limited W

Maximum Junction Temperature TJ(max) 150 °C

Storage Temperature Range Tstg −65 to +150 °C

ESD Capability, Human Body Model (Note 2) NCP7805, NCP7808

NCP7812, NCP7815

ESDHBM 4

ESD Capability, Machine Model (Note 2) ESDMM 400 V

Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the

Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect

device reliability.

1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per EIA/JESD22−A114

ESD Machine Model tested per EIA/JESD22−A115

Latchup Current Maximum Rating: ≤150 mA per JEDEC standard: JESD78

Table 3. THERMAL CHARACTERISTICS

Rating Symbol Value Unit

Thermal Characteristics, TO−220−3 (Note 3)

Thermal Resistance, Junction−to−Case

Thermal Resistance, Junction−to−Air (Note 4)

RqJC

RqJA

7.5

°C/W

3. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

4. Value based on thermal measurement in a test socket.

Table 4. OPERATING RANGES (Note 5)

Rating Symbol Min Max Unit

Input Voltage (Note 6) (for Vout: 5.0 − 15 V) Vin 7.0 35 V

Junction Temperature TJ0 125 °C

5. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

6. Minimum Vin = 7.0 V or (Vout + VDO), whichever is higher.

NCP7800

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Table 5. ELECTRICAL CHARACTERISTICS (Vin = 10 V, IO = 500 mA, TJ = 0°C to 125°C, unless otherwise noted) (Note 7)

Characteristic Symbol

NCP7805

Unit

Min Typ Max

Output Voltage (TJ = 25°C) VO4.8 5.0 5.2 Vdc

Output Voltage (5.0 mA ≤ IO ≤ 1.0 A, PD ≤15 W)

7.0 Vdc ≤ Vin ≤ 20 Vdc

VO4.75 5.0 5.25

Vdc

Line Regulation (TJ = 25°C)

7.5 Vdc ≤ Vin ≤ 20 Vdc

8.0 Vdc ≤ Vin ≤ 12 Vdc

Regline

−

1.1

0.6

100

Load Regulation (TJ = 25°C)

5.0 mA ≤ IO ≤ 1.0 A

5.0 mA ≤ IO ≤ 1.5 A

Regload

−

1.5

2.9

100

Quiescent Current (TJ = 25°C) IB−3.0 8 mA

Quiescent Current Change

7.0 Vdc ≤ Vin ≤ 25 Vdc

5.0 mA ≤ IO ≤ 1.0 A

DIB−

−

0.28

0.07

1.3

0.5

Ripple Rejection (Note 8)

8.0 Vdc ≤ Vin ≤ 18 Vdc, f = 120 Hz

RR 62 75 −dB

Dropout Voltage (IO = 1.0 A, TJ = 25°C) (Note 8) VI − VO−2.0 −Vdc

Output Noise Voltage (TJ = 25°C) (Note 8)

10 Hz ≤ f ≤ 100 kHz

Vn−6.8 −mV/VO

Output Resistance f = 1.0 kHz (Note 8) rO−2.2 −mW

Short Circuit Current Limit (TJ = 25°C) (Note 8)

Vin = 35 Vdc

ISC −0.3 −A

Peak Output Current (TJ = 25°C) (Note 8) Imax −2.4 −A

Average Temperature Coefficient of Output Voltage (Note 8) TCVO−0.13 −mV/°C

7. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

8. Value based on design and/or characterization.

NCP7800

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Table 6. ELECTRICAL CHARACTERISTICS (Vin = 14 V, IO = 500 mA, TJ = 0°C to 125°C, unless otherwise noted) (Note 9)

Characteristic Symbol

NCP7808

Unit

Min Typ Max

Output Voltage (TJ = 25°C) VO7.68 8.0 8.32 Vdc

Output Voltage (5.0 mA ≤ IO ≤ 1.0 A, PD ≤15 W)

10.5 Vdc ≤ Vin ≤ 23 Vdc

VO7.60 8.0 8.40

Vdc

Line Regulation (TJ = 25°C)

10.5 Vdc ≤ Vin ≤ 25 Vdc

11.0 Vdc ≤ Vin ≤ 17 Vdc

Regline

−

1.8

1.0

160

Load Regulation (TJ = 25°C)

5.0 mA ≤ IO ≤ 1.5 A

Regload

−3.7 160

Quiescent Current (TJ = 25°C) IB−3.0 8.0 mA

Quiescent Current Change

10.5 Vdc ≤ Vin ≤ 25 Vdc

5.0 mA ≤ IO ≤ 1.0 A

DIB−

−

1.0

0.5

Ripple Rejection (Note 10)

11.5 Vdc ≤ Vin ≤ 21.5 Vdc, f = 120 Hz

RR 56 72 −dB

Dropout Voltage (IO = 1.0 A, TJ = 25°C) (Note 10) VI − VO−2.0 −Vdc

Output Noise Voltage (TJ = 25°C) (Note 10)

10 Hz ≤ f ≤ 100 kHz

Vn−6.8 −mV/VO

Output Resistance f = 1.0 kHz (Note 10) rO−2.7 −mW

Short Circuit Current Limit (TJ = 25°C) (Note 10)

Vin = 35 Vdc

ISC −0.3 −A

Peak Output Current (TJ = 25°C) (Note 10) Imax −2.4 −A

Average Temperature Coefficient of Output Voltage (Note 10) TCVO−0.24 −mV/°C

9. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

10.Value based on design and/or characterization.

NCP7800

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Table 7. ELECTRICAL CHARACTERISTICS (Vin = 19 V, IO = 500 mA, TJ = 0°C to 125°C, unless otherwise noted) (Note 11)

Characteristic Symbol

NCP7812

Unit

Min Typ Max

Output Voltage (TJ = 25°C) VO11.52 12 12.48 Vdc

Output Voltage (5.0 mA ≤ IO ≤ 1.0 A, PD ≤15 W)

14.5 Vdc ≤ Vin ≤ 27 Vdc

VO11.40 12 12.60

Vdc

Line Regulation (TJ = 25°C)

14.5 Vdc ≤ Vin ≤ 30 Vdc

16 Vdc ≤ Vin ≤ 22 Vdc

Regline

−

2.7

1.4

240

120

Load Regulation (TJ = 25°C)

5.0 mA ≤ IO ≤ 1.5 A

Regload

−5.5 240

Quiescent Current (TJ = 25°C) IB−3.0 8.0 mA

Quiescent Current Change

14.5 Vdc ≤ Vin ≤ 30 Vdc

5.0 mA ≤ IO ≤ 1.0 A

DIB−

−

1.0

0.5

Ripple Rejection (Note 12)

15 Vdc ≤ Vin ≤ 25 Vdc, f = 120 Hz

RR 55 71 −dB

Dropout Voltage (IO = 1.0 A, TJ = 25°C) (Note 12) VI − VO−2.0 −Vdc

Output Noise Voltage (TJ = 25°C) (Note 12)

10 Hz ≤ f ≤ 100 kHz

Vn−6.8 −mV/VO

Output Resistance f = 1.0 kHz (Note 12) rO−3.6 −mW

Short Circuit Current Limit (TJ = 25°C) (Note 12)

Vin = 35 Vdc

ISC −0.3 −A

Peak Output Current (TJ = 25°C) (Note 12) Imax −2.4 −A

Average Temperature Coefficient of Output Voltage (Note 12) TCVO−0.47 −mV/°C

11. Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

12.Value based on design and/or characterization.

NCP7800

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Table 8. ELECTRICAL CHARACTERISTICS (Vin = 23 V, IO = 500 mA, TJ = 0°C to 125°C, unless otherwise noted) (Note 13)

Characteristic Symbol

NCP7815

Unit

Min Typ Max

Output Voltage (TJ = 25°C) VO14.40 15 15.60 Vdc

Output Voltage (5.0 mA ≤ IO ≤ 1.0 A, PD ≤15 W)

17.5 Vdc ≤ Vin ≤ 30 Vdc

VO14.25 15 15.75

Vdc

Line Regulation (TJ = 25°C)

17.9 Vdc ≤ Vin ≤ 30 Vdc

20 Vdc ≤ Vin ≤ 26 Vdc

Regline

−

3.3

1.8

300

150

Load Regulation (TJ = 25°C)

5.0 mA ≤ IO ≤ 1.5 A

Regload

−6.9 300

Quiescent Current (TJ = 25°C) IB−3.0 8.0 mA

Quiescent Current Change

17.5 Vdc ≤ Vin ≤ 30 Vdc

5.0 mA ≤ IO ≤ 1.0 A

DIB−

−

1.0

0.5

Ripple Rejection (Note 14)

18.5 Vdc ≤ Vin ≤ 28.5 Vdc, f = 120 Hz

RR 54 70 −dB

Dropout Voltage (IO = 1.0 A, TJ = 25°C) (Note 14) VI − VO−2.0 −Vdc

Output Noise Voltage (TJ = 25°C) (Note 14)

10 Hz ≤ f ≤ 100 kHz

Vn−6.8 −mV/VO

Output Resistance f = 1.0 kHz (Note 14) rO−4.7 −mW

Short Circuit Current Limit (TJ = 25°C) (Note 14)

Vin = 35 Vdc

ISC −0.3 −A

Peak Output Current (TJ = 25°C) (Note 14) Imax −2.4 −A

Average Temperature Coefficient of Output Voltage (Note 14) TCVO−0.42 −mV/°C

13.Performance guaranteed over the indicated operating temperature range by design and/or characterization, production tested at

TJ = TA = 25°C. Low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible.

14.Value based on design and/or characterization.

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NCP7800

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TYPICAL CHARACTERISTICS

Figure 3. Peak Output Current as a Function

of Input/Output Differential Voltage (NCP7805)

Figure 4. Ripple Rejection as a Function of

Output Voltage

Vin − Vout, INPUT/OUTPUT VOLTAGE DIFFERENTIAL (V)

f, FREQUENCY (kHz)

40302520151050

0.5

1.0

1.5

2.0

2.5

3.0

1010.10.01

Figure 5. Ripple Rejection as a Function of

Frequency (NCP7805)

Figure 6. Output Voltage as a Function of

Junction Temperature (NCP7805)

TJ, JUNCTION TEMPERATURE (°C)

14010060 18

20−20−60

4.80

4.85

4.90

4.95

5.00

5.05

5.10

1007550250−25−50

IO, OUTPUT CURRENT (A)

RR, RIPPLE REJECTION (dB)

VO, OUTPUT VOLTAGE (V)

IB, QUIESCENT CURRENT (mA)

TJ = 0°C

TJ = 25°C

TJ = 125°C

Vin = 8.0 V to 18 V

IO = 500 mA

TA = 25°C

125

Vin = 20 V

IO = 5.0 mA

Vin = 10 V

VO = 5.0 V

IL = 20 mA

Figure 7. Output Impedance as a Function of

Output Voltage

Figure 8. Quiescent Current as a Function of

Temperature (NCP7805)

VO, OUTPUT VOLTAGE (V)

RR, RIPPLE REJECTION (dB)

PART #  Vin

NCP7805= 10 V

NCP7808= 14 V

NCP7812= 19 V

NCP7815= 23 V

f = 120 Hz

IO = 20 mA

DVin = 1.0 V(RMS)

2016141210864

18 2422

VO, OUTPUT VOLTAGE (V)

2016141210864

0.1

18 2422

ZO, OUTPUT IMPEDANCE (mW)

f = 120 Hz

IO = 500 mA

CL = 0 mF

NCP7800

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APPLICATIONS INFORMATION

Design Considerations

The NCP7800 Series of fixed voltage regulators are

designed with Thermal Overload Protection that shuts down

the circuit when subjected to an excessive power overload

condition, Internal Short Circuit Protection that limits the

maximum current the circuit will pass, and Output Transistor

Safe−Area Compensation that reduces the output short circuit

current as the voltage across the pass transistor is increased.

In many low current applications, compensation

capacitors are not required. However, it is recommended

that the regulator input be bypassed with a capacitor if the

regulator is connected to the power supply filter with long

wire lengths, or if the output load capacitance is large. An

input bypass capacitor should be selected to provide good

high−frequency characteristics to insure stable operation

under all load conditions. A 0.33 mF or larger tantalum,

mylar, or other capacitor having low internal impedance at

high frequencies should be chosen. The bypass capacitor

should be mounted with the shortest possible leads directly

across the regulators input terminals. Normally good

construction techniques should be used to minimize ground

loops and lead resistance drops since the regulator has no

external sense lead.

IO+5.0V

R)IB

Figure 9. Current Regulator Figure 10. Adjustable Output Regulator

Figure 11. Current Boost Regulator Figure 12. Short Circuit Protection

The NCP7800 regulators can also be used as a current source when

connected as above. In order to minimize dissipation the NCP7805 is

chosen in this application. Resistor R determines the current as follows:

For example, a 1.0 A current source would require R to be a 5.0 W,

10 W resistor and the output voltage compliance would be the input

voltage less 7.0 V.

IB ^ 3.2 mA over line and load changes.

Input

0.33 mFR

NCP7805

Constant

Current to

Grounded

Load

The addition of an operational amplifier allows adjustment to higher or

intermediate values while retaining regulation characteristics. The

minimum voltage obtainable with this arrangement is 2.0 V greater than the

regulator voltage.

Input NCP7805

Output

0.33 mF

10 k

MC34072V

1.0 k

VO = 7.0 V to 20 V

VIN ≥ VO + 2.0 V

0.1 mF

The NCP7800 series can be current boosted with a PNP transistor. The

MJ2955 provides current to 5.0 A. Resistor R in conjunction with the VBE

of the PNP determines when the pass transistor begins conducting; this

circuit is not short circuit proof. Input/output differential voltage minimum is

increased by VBE of the pass transistor.

XX = 2 digits of type number indicating voltage.

NCP78XX

Input

Output

1.0 mF

MJ2955 or Equiv.

1.0 mF

The circuit of Figure 11 can be modified to provide supply protection

against short circuits by adding a short circuit sense resistor, RSC, and an

additional PNP transistor. The current sensing PNP must be able to handle

the short circuit current of the three-terminal regulator. Therefore, a

four-ampere plastic power transistor is specified.

XX = 2 digits of type number indicating voltage.

1.0 mF

NCP78XX

MJ2955

or Equiv.

Output

RSC

2N6049

or Equiv.

≥ 10 mF

RSource

0.33 mFInput

RSource

0.33 mF

≥ 10 mF

\n : 500 mA '0 (Mg: EGAN {m5 : ISQC/W No Heatsmk

NCP7800

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Figure 13. Worst Case Power Dissipation vs.

Ambient Temperature (TO−220)

Figure 14. Input Output Differential as a Function

of Junction Temperature

, POWER DISSIPATION (W)

8.0

4.0

-50 -25 0 25 50 75 100 125 150

TA, AMBIENT TEMPERATURE (°C)

DIFFERENTIAL (V)

in out, INPUT-OUTPUT VOLTAGE

0.5

0-75 -50 -25 0 25 50 75 100

TJ, JUNCTION TEMPERATURE (°C)

- VV

DVO = 2% of VO

2.0

1.5

1.0

2.5

125

qHS = 0°C/W

qHS = 5°C/W

qHS = 15°C/W

No Heatsink

qJC = 7.5°C/W

qJA = 65°C/W

TJ(max) = 150°CIO = 1.0 A

IO = 500 mA

IO = 200 mA

IO = 20 mA

IO = 0 mA

Protection Diode

The NCP7800 Series has internal low impedance (about

1W) diode path that normally does not require protection

when used in the typical regulator applications. The path

connects between output and input and it can withstand a

peak surge current of about 5 A for a reasonable time

(several milliseconds). Normal cycling of Vin cannot

generate a current surge of this magnitude for too long time

since output capacitor discharges from output to input and

follows input voltage therefore the magnitude of reverse

current is not so high. However, when Vin is shorted or

crowbarred to ground and output cap is too large and

moreover if higher voltage option is used then the peak of

reverse current is much higher than 5 A and lasts more than

several milliseconds. In this case a damage may occur to the

regulator.

To protect the regulator the external bypass diode

connected between output and input is recommended. The

protection diode should be rated for sufficient peak current.

Figure 15. Protection Diode Placement

Input

Cin

NCP78XX

Protection Diode

Cout

Output

NCP7800

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DEFINITIONS

Line Regulation − The change in output voltage for a

change in the input voltage. The measurement is made under

conditions of low dissipation or by using pulse techniques

such that the average chip temperature is not significantly

affected.

Load Regulation − The change in output voltage for a

change in load current at constant chip temperature.

Maximum Power Dissipation − The maximum total

device dissipation for which the regulator will operate

within specifications.

Quiescent Current − That part of the input current that is

not delivered to the load.

Output Noise Voltage − The rms ac voltage at the output,

with constant load and no input ripple, measured over a

specified frequency range.

Long Term Stability − Output voltage stability under

accelerated life test conditions with the maximum rated

voltage listed in the devices’ electrical characteristics and

maximum power dissipation.

ORDERING INFORMATION

Device Nominal Voltage

Operating

Temperature Range Package Shipping

NCP7805TG 5.0 V TJ = 0°C to +125°CTO−220

(Pb−Free)

50 Units / Rail

NCP7808TG 8.0 V TJ = 0°C to +125°CTO−220

(Pb−Free)

50 Units / Rail

NCP7812TG 12 V TJ = 0°C to +125°CTO−220

(Pb−Free)

50 Units / Rail

NCP7815TG 15 V TJ = 0°C to +125°CTO−220

(Pb−Free)

50 Units / Rail

MECHANICAL CASE OUTLINE on semiwnduﬂm" PACKAGE DIMENSIONS T07220, SINGLE GAUGE CASE 221 A3701 ISSU E A DATE 16 NOV 2010 Mmss 2 mMstmNmG 22m vastemG Psamsw mm. 2222 :r- swwe 2 eonoumeMstmN wcHss PM“ 3 DIMENSWN Z DEFINES A ZONE WHERE ALL EDDY AND F LsADmRsGuumnssmsAuowsD T C 2 PRODUEY smwso won m mm mm mustons 7 57,2 .7 SeamssnusemcHEShubanMb sms ‘ PIN ‘ 2 3 2 sms 5 PIN ‘ 2 3 2 sms 9 PIN ‘ 2 3 2 BASE museum smnsa museum ens mm sounes mm ens museum smnsa museum - lucuss mumsvsns mm mm mx mm m A (15711 2222 2.22 1575 e um ms ass mza e ulsu men 107 222 u n uuzs ms 222 m r 2222 am 361 272 r, was ums 222 222 22 um: mss m 222 2 mm unzs ms rm 2: usna ass: mm 222: |. mus unsn H5 ‘52 22 um um .22 s22 R .7 u ulna mu 2s2 222 a mm: mm m 272 J 2 mm: 2222 Dana rm r 222s uzss 597 s27 2 um: um um m V mus H5 z um 222 sms2 ems: sms2 mm 222s le cAIHons mm unmvsnumnu 2 stsn 2 mobs 2 mnmvsmmm 2 museum 2 ms 2 ans 2 stsn 2 mobs 2 mnmvsmmm smss smsv sWLsn mm mops le cAIHons mm eAvHoDs 2 means 2 mobs 2 mans 2 mops 2 cAIHons 2 msnmmwmsw 2 means 2 mobs 2 mans smsm smsu mm {ms mm mm 2 saunas 2 souaes 2 mm 2 ms 2 saunas 2 souaes ON Semxcunduclm and ngms ul n|hers are hademavks av Semxcanduclur eempanems lndusllles. ue dha ON Semlcanduclar ar us sunsmnee m xne mnuee sxaxes andJm mhev cmmmes ON Semxcunduclar vesewes me "gm :2 make changes wxlhnm mne. nanee :2 any pruduns neqem ON Semmneuaw makes nu wanamy. represenlalmn m guarantee regarding me smewny at W; manual: can any pamcu‘av purpase nnv dues ON Semumnduclm assume any \Iatmny snsmg 2mm me applwcshan m use no any pmdudnv clrcuﬂ and speameeny dlsc‘axms any and en \Iahl‘lly mememg wxlham \Imxta‘mn spemax cansequemm m \nmdeula‘ damages ON Sennmnauexer dues nn| eenyey eny hcense under Ms paler“ nghl: Ivar xne

TO−220, SINGLE GAUGE

CASE 221AB−01

ISSUE A

DATE 16 NOV 2010

SCALE 1:1

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: INCHES.

3. DIMENSION Z DEFINES A ZONE WHERE ALL BODY AND

LEAD IRREGULARITIES ARE ALLOWED.

4. PRODUCT SHIPPED PRIOR TO 2008 HAD DIMENSIONS

S = 0.045 - 0.055 INCHES (1.143 - 1.397 MM)

STYLE 1:

PIN 1. BASE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

STYLE 2:

PIN 1. BASE

2. EMITTER

3. COLLECTOR

4. EMITTER

STYLE 3:

PIN 1. CATHODE

2. ANODE

3. GATE

4. ANODE

STYLE 4:

PIN 1. MAIN TERMINAL 1

2. MAIN TERMINAL 2

3. GATE

4. MAIN TERMINAL 2

STYLE 7:

PIN 1. CATHODE

2. ANODE

3. CATHODE

4. ANODE

STYLE 10:

PIN 1. GATE

2. SOURCE

3. DRAIN

4. SOURCE

STYLE 5:

PIN 1. GATE

2. DRAIN

3. SOURCE

4. DRAIN

STYLE 8:

PIN 1. CATHODE

2. ANODE

3. EXTERNAL TRIP/DELAY

4. ANODE

STYLE 6:

PIN 1. ANODE

2. CATHODE

3. ANODE

4. CATHODE

STYLE 9:

PIN 1. GATE

2. COLLECTOR

3. EMITTER

4. COLLECTOR

STYLE 11:

PIN 1. DRAIN

2. SOURCE

3. GATE

4. SOURCE

DIM MIN MAX MIN MAX

MILLIMETERSINCHES

A0.570 0.620 14.48 15.75

B0.380 0.405 9.66 10.28

C0.160 0.190 4.07 4.82

D0.025 0.035 0.64 0.88

F0.142 0.147 3.61 3.73

G0.095 0.105 2.42 2.66

H0.110 0.155 2.80 3.93

J0.018 0.025 0.46 0.64

K0.500 0.562 12.70 14.27

L0.045 0.060 1.15 1.52

N0.190 0.210 4.83 5.33

Q0.100 0.120 2.54 3.04

R0.080 0.110 2.04 2.79

S0.020 0.024 0.508 0.61

T0.235 0.255 5.97 6.47

U0.000 0.050 0.00 1.27

V0.045 --- 1.15 ---

Z--- 0.080 --- 2.04

123

SEATING

PLANE

−T−

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

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