Scheda tecnica IRS2453(1)D(S) di Infineon Technologies

International ISBR Rec’rifier - www.irf.com
IRS2453(1)D(S)
1
www.irf.com
© 2016 International Rectifier
April 27, 2016
Features
Integrated 600 V full-bridge gate driver
CT, RT programmable oscillator
15.6 V Zener clamp on VCC
Micropower startup
Logic level latched shutdown pin
Non-latched shutdown on CT pin (1/6th VCC)
Internal bootstrap FETs
Excellent latch immunity on all inputs & outputs
ESD protection on all pins
14-lead SOIC or PDIP package
0.5 or 1.0μs (typ.) internal dead time
RoHS compliant
Product Summary
Topology
VOFFSET
Io+ & I o- (typical)
Deadtime (typical)
Package Options
14 Lead PDIP 14 Lead SOIC
IRS2453DPbF (Narrow Body)
IRS2453(1)DSPbF
Ordering Information
Base Part Number
Package Type
Standard Pack
Complete Part Number
Form
Quantity
IRS2453D(S)
PDIP14
Tube/Bulk
25
IRS2453DPBF
SOIC14N
Tube/Bulk
55
IRS2453DSPBF
Tape and Reel
2500
IRS2453DSTRPBF
IRS24531DS
SOIC14N
Tube/Bulk
55
IRS24531DSPBF
Tape and Reel
2500
IRS24531DSTRPBF
IEZR - www.irf.com
IRS2453(1)D(S)
2
www.irf.com
© 2016 International Rectifier
April 27, 2016
Table of Contents
Page
Ordering Information
1
Description
3
Typical Connection Diagram
3
Qualification Information
4
Absolute Maximum Ratings
5
Recommended Operating Conditions
6
Recommended Component Values
6
Electrical Characteristics
7
Functional Block Diagram
9
Input / Output Pin Equivalent Circuit Diagram
10
Lead Definitions
11
Lead Assignments
11
Application Information and Additional Details
12
Package Details
15
Tape and Reel Details
16
Part Marking Information
17
IEZR www.irf.com
IRS2453(1)D(S)
3
www.irf.com
© 2016 International Rectifier
April 27, 2016
Description
The IRS2453(1)D is based on the popular IR2153 self-oscillating half-bridge gate driver IC, and incorporates a
high voltage full-bridge gate driver with a front end oscillator similar to the industry standard CMOS 555 timer.
HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The output driver
features a high pulse current buffer stage designed for minimum driver cross-conduction. Noise immunity is
achieved with low di/dt peak of the gate drivers, and with an under voltage lockout hysteresis greater than 1.5 V.
The IRS2453(1)D also includes latched and non-latched shutdown pins.
Typical Connection Diagram
LOAD
14
13
12
11
10
9
8
1
2
3
4
5
6
7
IRS2453(1)D
VCC
CT
RT
LO1
LO2
SD
VB1
HO1
VS1
VB2
HO2
VS2
COM
NC
+ AC rectified line
- AC rectified line
15 V
IEZR ‘n 2m T httg://www.irf.com/ - www.irf.com
IRS2453(1)D(S)
4
www.irf.com
© 2016 International Rectifier
April 27, 2016
Qualification Information†
Qualification Level
Industrial††
Comments: This family of ICs has passed JEDEC’s
Industrial qualification. IR’s Consumer qualification level is
granted by extension of the higher Industrial level.
Moisture Sensitivity Level
SOIC14
MSL2††† 260°C
(per IPC/JEDEC J-STD-020)
PDIP14
Not applicable
(non-surface mount package style)
ESD
Machine Model
Class C
(per JEDEC standard JESD22-A115)
Human Body Model
Class 2
(per EIA/JEDEC standard EIA/JESD22-A114)
IC Latch-Up Test
Class I, Level A
(per JESD78)
RoHS Compliant
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/
††
Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information.
†††
Higher MSL ratings may be available for the specific package types listed here. Please contact your
International Rectifier sales representative for further information.
IEZR VHOZ VL02 - WWW irf com
IRS2453(1)D(S)
5
www.irf.com
© 2016 International Rectifier
April 27, 2016
Absolute Maximum Ratings
Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage
parameters are absolute voltages referenced to COM, all currents are defined positive into any lead. The thermal
resistance and power dissipation ratings are measured under board mounted and still air conditions.
Symbol
Definition
Min.
Max.
Units
VB1,
VB2
High side floating supply voltage
-0.3
625
V
VS1,
VS2
High side floating supply offset voltage
VB - 25
VB + 0.3
VHO1,
VHO2
High side floating output voltage
VS - 0.3
VB + 0.3
VLO1,
VLO2
Low side output voltage
-0.3
VCC + 0.3
VRT
RT pin voltage
-0.3
VCC + 0.3
VCT
CT pin voltage
-0.3
VCC + 0.3
VSD
SD pin voltage
-0.3
VCC + 0.3
IRT
RT pin current
-5
5
mA
ICC
Supply current (†)
---
25
dVS/dt
Allowable offset voltage slew rate
-50
50
V/ns
PD
Maximum power dissipation @ TA≤ +25 ºC, PDIP14
---
1.6
W
PD
Maximum power dissipation @ TA ≤ +25 ºC, SOIC14N
---
1.0
RθJA
Thermal resistance, junction to ambient, PDIP14
---
75
ºC/W
RθJA
Thermal resistance, junction to ambient, SOIC14N
---
120
TJ
Junction temperature
-55
150
ºC
TS
Storage temperature
-55
150
TL
Lead temperature (soldering, 10 seconds)
---
300
†
This IC contains a zener clamp structure between the chip VCC and COM which has a nominal
breakdown voltage of 15.6 V. Please note that this supply pin should not be driven by a DC, low
impedance power source greater than the VCLAMP specified in the Electrical Characteristics section.
IEZR - www.irf.com
IRS2453(1)D(S)
6
www.irf.com
© 2016 International Rectifier
April 27, 2016
Recommended Operating Conditions
For proper operation the device should be used within the recommended conditions.
Symbol
Definition
Min.
Max.
Units
VBS1,
VBS2
High side floating supply voltage
VCC - 0.7
VCLAMP
V
VS1, VS2
Steady state high side floating supply offset voltage
-3.0 (†)
600
VCC
Supply voltage
VCCUV+
VCLAMP
ICC
Supply current
(††)
5
mA
TJ
Junction temperature
-25
125
ºC
†
It is recommended to avoid output switching conditions where negative-going spikes at the VS node
would decrease VS below ground by more than -5V.
††
Enough current should be supplied to the VCC pin of the IC to keep the internal 15.6 V zener diode
clamping the voltage at this pin.
Recommended Component Values
Symbol
Component
Min.
Max.
Units
RT
Timing resistor value
1
---
k
CT
CT pin capacitor value
330
---
pF
VBIAS (VCC, VBS) = 14 V, VS=0 V and TA = 25 °C, CLO1=CLO2 = CHO1=CHO2 = 1nF.
IRS2453D Frequency vs. RT
10
100
1000
10000
100000
1000000
1000 10000 100000 1000000
RT (Ohm)
Frequency (Hz)
330pf
470pF
1nF
2.2nF
4.7nF
10nF
CT Values
IRS2453(1)D Frequency vs. RT
IRS2453(1)D Frequency vs. RT
, IezR _ - www.irf.com
IRS2453(1)D(S)
7
www.irf.com
© 2016 International Rectifier
April 27, 2016
Electrical Characteristics
VBIAS (VCC, VBS) = 14 V, CT = 1nF and TA = 25 °C unless otherwise specified. The VO and IO parameters are
referenced to COM and are applicable to the respective output leads:
HO or LO. CLO1=CLO2=CHO1=CHO2=1nF.
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Low Voltage Supply Characteristics
VCCUV+
Rising VCC under voltage lockout threshold
10.0
11.0
12.0
V
VCCUV-
Falling VCC under voltage lockout threshold
8.0
9.0
10.0
VCCUVH
YS
VCC under voltage lockout hysteresis
1.5
2.0
2.4
IQCCUV
Micropower startup VCC supply current
---
140
200
µA
VCC VCCUV-
IQCC
Quiescent VCC supply current
---
1.3
2.0
mA
ICC_20K
VCC supply current at fosc (RT = 36.5 kΩ)
---
3.0
360
3.5
ICCFLT
VCC supply current when SD > VSD
---
360
500
µA
VCLAMP
VCC Zener clamp voltage
14.6
15.6
16.6
V
ICC = 5 mA
Floating Supply Characteristics
IQBS1UV,
IQBS2UV
Micropower startup VBS supply current
---
3
10
µA
VCC VCCUV-
, VCC = VBS
IQBS1,
IQBS2
Quiescent VBS supply current
---
30
100
VBS1UV+,
VBS2UV+
VBS supply under voltage positive going
threshold
8.0
9.0
10.0
V
VBS1UV-,
VBS2UV-
VBS supply under voltage negative going
threshold
7.0
8.0
9.0
ILK1, ILK2
Offset supply leakage current
---
---
50
A
VB = VS = 600
V
Oscillator I/O Characteristics
fOSC
Oscillator frequency
19.6
20.2
20.8
kHz
RT = 36.5 k
88
94
100
RT = 7.15 k
d
RT pin duty cycle
48
50
52
%
fo < 100 kHz
ICT
CT pin current
---
0.05
1.0
A
ICTUV
UV-mode CT pin pull down current
1
5
---
mA
VCC = 7 V
VCT+
Upper CT ramp voltage threshold
---
9.3
---
V
VCT-
Lower CT ramp voltage threshold
---
4.7
---
VRT+
High level RT output voltage, VCC - VRT
---
10
50
mV
IRT = 100 A
RT = 140 k
---
100
300
IRT = 1 mA
RT = 14 k
VRT-
Low level RT output voltage
---
10
50
IRT = 100 A
RT = 140 k
---
100
300
IRT = 1 mA
RT = 14 k
VRTUV
UV-mode RT output voltage
---
0
100
VCC VCCUV-
IEZR Vaz ON 52 CAP - www.irf.com
IRS2453(1)D(S)
8
www.irf.com
© 2016 International Rectifier
April 27, 2016
Electrical Characteristics
VBIAS (VCC, VBS) = 14 V, CT = 1nF and TA = 25 °C, unless otherwise specified. The VO and IO parameters are
referenced to COM and are applicable to the respective output leads:
HO or LO. CLO1=CLO2=CHO1=CHO2=1nF.
Symbol
Definition
Min
Typ
Max
Units
Test Conditions
Gate Driver Output Characteristics
VOH
High level output voltage, VBIAS - VO
---
VCC
---
V
IO = 0 A
VOL
Low level output voltage, VO
---
COM
---
VOL_UV
UV-mode output voltage, VO
---
COM
---
IO = 0 A,
VCC
VCCUV-
tr
Output rise time
---
120
200
ns
tf
Output fall time
---
50
100
tsd
Shutdown propagation delay
---
250
---
td
Output dead time (HO or LO)
IRS2453D
0.8
1.0
1.40
s
IRS24531D
0.4
0.5
0.7
IO+
Output source current
---
180
---
mA
IO-
Output sink current
---
260
---
Shutdown
VSD
Shutdown threshold at SD pin (latched)
1.8
2.0
2.3
V
VCTSD
CT voltage shutdown threshold (non-latched)
2.2
2.3
2.5
VRTSD
SD mode RT output voltage, VCC - VRT
---
10
50
mV
IRT = 100 A,
RT = 140 k
VCT = 0 V
---
100
300
IRT = 1 mA,
RT = 14 k
VCT = 0 V
Bootstrap FET Characteristics
VB1_ON
VB2_ON
VB when the bootstrap FET is on
13.7
14.0
---
V
IB1_CAP
IB2_CAP
VB source current when FET is on
40
55
---
mA
CBS=0.1 μF
IB1_10 V
IB2_10 V
VB source current when FET is on
10
12
---
VB=10 V
IEZR
IRS2453(1)D(S)
9
www.irf.com
© 2016 International Rectifier
April 27, 2016
Functional Block Diagram
VB1
PULSE
GEN
DELAY
PULSE
FILTER
LO1
VS1
R
S
Q
CT
RT
R Q
SQ
HO1
-
-
-
+
+
+
R
R
R/2
R/2
VB2
PULSE
GEN
DELAY
HV
Level
Shift
VCC
PULSE
FILTER
LO2
VS2
COM
R
S
Q
15.4V
HO2
SD
2.0V
UV
DETECT
DEAD
TIME
S
R
Q
DEAD
TIME
R1
SQ
R2
BOOTSTRAP
DRIVE
4
3
5
2
7
1
8
9
10
6
12
13
14
HV
Level
Shift
BOOTSTRAP
DRIVE
Q
, 1:23 _ H H H H - www.irf.com
IRS2453(1)D(S)
10
www.irf.com
© 2016 International Rectifier
April 27, 2016
Input / Output Pin Equivalent Circuit Diagrams:
VCC
COM
LO1
ESD
Diode
ESD
Diode
VB1
VS1
HO1
ESD
Diode
ESD
Diode
25V
25V
600V
VCC
COM
LO2
ESD
Diode
ESD
Diode
VB2
VS2
HO2
ESD
Diode
ESD
Diode
25V
25V
600V
VCC
COM
SD
ESD
Diode
ESD
Diode
RESD
VCC
ESD
Diode
ESD
Diode
25V
VCC
COM
CT
ESD
Diode
ESD
Diode
RESD
, IezR _ - www.irf.com
IRS2453(1)D(S)
11
www.irf.com
© 2016 International Rectifier
April 27, 2016
Lead Definitions
Pin
Symbol
Description
1
VCC
Logic and internal gate drive supply voltage
2
COM
IC power and signal ground
3
CT
Oscillator timing capacitor input
4
RT
Oscillator timing resistor input
5
SD
Shutdown input
6
LO1
Low side gate driver output
7
LO2
Low side gate driver output
8
VS2
High voltage floating supply return
9
HO2
High side gate driver output
10
VB2
High side gate driver floating supply
11
NC
No connect
12
VS1
High voltage floating supply return
13
HO1
High side gate driver output
14
VB1
High side gate driver floating supply
Lead Assignment
14
13
12
11
10
9
8
1
2
3
4
5
6
7
IRS2453(1)D(S)
VCC
CT
RT
LO1
LO2
SD
VB1
HO1
VS1
VB2
HO2
VS2
COM
NC
IRS2453(1)D(S)
12
www.irf.com
© 2016 International Rectifier
April 27, 2016
Application Information and Additional Details
Timing Diagram
DT
DT
1/3 VCC
2/3 VCC
VCC
VCCUV+
LO1
VCC
LO2
VCC
1/6 VCC
VRT
VCC
IRT
-1mA
1mA
VCC
VCC
HO1
HO2
DT
Fault mode
VCT<1/6*VCC
IEZR less than 150 A, and to guarantee the IC ‘5 fully functwonal befor 1.453>
IRS2453(1)D(S)
13
www.irf.com
© 2016 International Rectifier
April 27, 2016
Functional Description
Under-Voltage Lock-Out Mode (UVLO)
The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on
threshold of the IC. The IRS2453(1)D under-voltage lock-out is designed to maintain an ultra low supply current of
e the high and low side output drivers are
activated. During under-voltage lock-out mode, the high and low side driver outputs LO1, LO2, HO1, HO2 are all
low. With VCC above the VCCUV+ threshold, the IC turns on and the output begin to oscillate.
Normal Operating Mode
Once VCC reaches the start-up threshold VCCUV+, the MOSFET M1 opens, RT increases to approximately VCC
(VCC-VRT+) and the external CT capacitor starts charging. Once the CT voltage reaches VCT- (about 1/3 of VCC),
established by an internal resistor ladder, LO1 and HO2 turn on with a delay equivalent to the dead time (td).
Once the CT voltage reaches VCT+ (approximately 2/3 of VCC), LO1 and HO2 go low, RT goes down to
approximately ground (VRT-), the CT capacitor starts discharging and the dead time circuit is activated. At the end
of the dead time, LO2 and HO1 go high. Once the CT voltage reaches VCT-, LO2 and HO1 go low, RT goes to
high again, the dead time is activated. At the end of the dead time, LO1 and HO2 go high and the cycle starts
over again.
The frequency is best determined by the graph, Frequency vs. RT, page 3, for different values of CT. A first order
approximate of the oscillator frequency can also be calculated by the following formula:
CTRT
f
453.1
1
This equation can vary slightly from actual measurements due to internal comparator over- and under-shoot
delays.
Bootstrap MOSFET
The internal bootstrap FET and supply capacitor (CBOOT) comprise the supply voltage for the high side driver
circuitry. The internal bootstrap FET only turns on when the corresponding LO is high. To guarantee that the high-
side supply is charged up before the first pulse on HO1 and HO2, LO1 and LO2 outputs are both high when CT
ramps between zero and 1/3*VCC. LO1 and LO2 are also high when CT is grounded below 1/6*VCC to ensure that
the bootstrap capacitor is charged when CT is brought back over 1/3*VCC.
Non-Latched Shutdown
If CT is pulled down below VCTSD (approximately 1/6 of VCC) by an external circuit, CT is not able to charge up
and oscillation stops. HO1 and HO2 outputs are held low. LO1 and LO2 outputs remain high while VCT remains
below VCT- enabling the bootstrap capacitors to charge. This state remains until the CT input is released and
oscillation can resume.
Latched Shutdown
When the SD pin is brought above 2 V, the IC goes into fault mode and all outputs are low. VCC has to be recycled
below VCCUV- to restart. The SD pin can be used for over-current or over-voltage protection using appropriate
external circuitry.
IEZR
IRS2453(1)D(S)
14
www.irf.com
© 2016 International Rectifier
April 27, 2016
td_HO1
50%
50%
50%
50%
HO1
LO1
td_LO1
50%
ton_LO
Deadtime Waveform
tr tf
90%
10%
HO
LO
Rise and Fall Time Waveform
ISER 20 L? L 795] L5 42 [ 725] NOTES L DLNENSLONLND A LDLENANDLNG PER ANSL YMerLgEZ CDNLROLLLNG DLMENSLON LNCH 2 3 DLMENSLDNS ARE SHUWN LN MLLLLMETERS [LNCHES] 6 DUTLLNE CONEDWS To JEDEC OUTLLNE MSrODLACV MEASURED WLTH THE LEADS CONSTRALNED TO BE PERFENDLCULAR TO DALULL PLANE C low LLLOLaL L77L aaoL .L‘ L .H‘t L7X [MEL ULHL MX -fl-’L6L OML 14 Lead SOIC (narrow body) [Q DLMENSLoN DOES NDL LNCLUDE NDLD PRDTLLSLDNS NDLD L77 PROTUSLDNS SHALL NOT EXCEED D25 [DLD] MX H 039 M i L ’5‘“ 533 [m] LL MAX “H a a n L I _ : : mm [m] L “x 322g {€321} ”X 0 2m [ DDS] 254 LL70 L2) m memo 14 Lead PDIP 01-300203 LMSVOOLACL L NOLLS ‘LA’ 4L W > DLNENSLONLNG N TOLFRANLTLNC PER ANSL MIN L987 8 55L MW 7 CONTROLLLNC ULMFNSLDN MLLLLMFLFR Q] L 1 DLNLNSLUNS ALLL SLLUWN LN MLLLLNLLLLLS LLNULLLSL L H H H H H H L OULLLNL CUNLDLLMS LOJLDLC UULLLNL MSiflLZL’LB, O u 6 70 L muL DLWNSLON LS LLLL LLNGLLL 0L LEAD LDR SOLDL’RLNG L0 599 LLh/L m) WM A mmmw L4H 58‘ LLbUL L LWL n76 L Li LLLMLN‘iLLW DUL‘; NLLL LNL'LLLLN MDLL) L’LLLHLLKLUN‘; Nm L) L LL LL LL LL LL LL LL ‘ PROTUSLONS QLALL NOT FXCFFD 0. L006 L 0 LDL LnerL ,0 L‘ (J 18L DLLL ‘ 4 ()75LLN198L L)“ L LL_LL EJJ'L‘Z’WDUL (7 4L LOLbL L5} LAX L Lm (1W L15 0532 D 25 [Dogs] 0L9 Lon75L ”X 0L76019 0173063 no (MSOI2ABL
IRS2453(1)D(S)
15
www.irf.com
© 2016 International Rectifier
April 27, 2016
Package Details
IEZR www.irf.com
IRS2453(1)D(S)
16
www.irf.com
© 2016 International Rectifier
April 27, 2016
Tape and Reel Details
CARRIER TAPE DIMENSION FOR 14SOICN
Code Min Max Min Max
A7.90 8.10 0.311 0.318
B 3.90 4.10 0.153 0.161
C15.70 16.30 0.618 0.641
D7.40 7.60 0.291 0.299
E6.40 6.60 0.252 0.260
F9.40 9.60 0.370 0.378
G1.50 n/a 0.059 n/a
H1.50 1.60 0.059 0.062
Metric
Imperial
REEL DIMENSIONS FOR 14SOICN
Code Min Max Min Max
A329.60 330.25 12.976 13.001
B20.95 21.45 0.824 0.844
C12.80 13.20 0.503 0.519
D1.95 2.45 0.767 0.096
E98.00 102.00 3.858 4.015
Fn/a 22.40 n/a 0.881
G18.50 21.10 0.728 0.830
H16.40 18.40 0.645 0.724
Metric
Imperial
E
F
A
C
D
G
A
B
H
NOTE : CONTROLLING
DIMENSION IN MM
LOADED TAPE FEED DIRECTION
A
H
F
E
G
D
B
C
IEZR - www.irf.com
IRS2453(1)D(S)
17
www.irf.com
© 2016 International Rectifier
April 27, 2016
Part Marking Information
IRS2453(1)D
IR logo
YWW ?
Part number
Date code
Pin 1
Identifier
Lot Code
(Prod mode –
4 digit SPN code)
Assembly site code
Per SCOP 200-002
? XXXX
MARKING CODE
Lead Free Released
Non-Lead Free Released
?
P
IEZR httg://www.irf.com/technicalrinfc/ - www.irf.com
IRS2453(1)D(S)
18
www.irf.com
© 2016 International Rectifier
April 27, 2016
The information provided in this document is believed to be accurate and reliable. However, International
Rectifier assumes no responsibility for the consequences of the use of this information. International
Rectifier assumes no responsibility for any infringement of patents or of other rights of third parties which
may result from the use of this information. No license is granted by implication or otherwise under any
patent or patent rights of International Rectifier. The specifications mentioned in this document are subject
to change without notice. This document supersedes and replaces all information previously supplied.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101N Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105